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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3600 Questions
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  • Answered

    What works as a data memory barrier? +1

    6917 views
    4 replies
    Latest over 8 years ago
    by kevinlayer
  • Answered

    Why is string defined with half '0's? +1

    • Cortex-M4
    3868 views
    1 reply
    Latest over 8 years ago
    by Simon Craske Arm Employee Badge
  • Answered

    Cortex A53 Out of Order? +1

    • Cortex-A53
    • Cortex-A
    8089 views
    3 replies
    Latest over 8 years ago
    by pizza
  • Answered

    ARM Processor board and Programming +1

    4258 views
    1 reply
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Cortex M0+ what means "optionally shifted" at some instructions like EOR (register) +1

    3826 views
    2 replies
    Latest over 8 years ago
    by Volker Kugler
  • Answered

    Speculative Branching. +1

    • Cortex-M3
    8107 views
    1 reply
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Security State transitions - Processor Mode +2

    • ANSI
    • CHI
    • Security
    • TrustZone
    • Armv8-M
    35099 views
    11 replies
    Latest over 8 years ago
    by raghu.ncstate
  • Answered

    ARM v7 Instruction Set Architecture Opcode Code +1

    • Armv7
    • Armv7-A
    • Arm Assembly Language (ASM)
    • AArch32
    23987 views
    4 replies
    Latest over 8 years ago
    by meromeo
  • Answered

    Arm1176 processor is getting hang, when I use Multiple register data transfer instructions, my Stack pointer is in DDR +1

    6900 views
    7 replies
    Latest over 8 years ago
    by daith
  • Answered

    Security principles for TrustZone for ARMv8-M - example slide 22 +1

    • Security
    • TrustZone
    • Armv8-M
    • Interrupt
    • Memory
    9257 views
    2 replies
    Latest over 8 years ago
    by raghu.ncstate
  • Answered

    Development with ARMv8a debug (and watchpoint) registers. +1

    4951 views
    1 reply
    Latest over 8 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    How to know if the processor is in EL0 state on armv8? +2

    • ARMv8 Exception Model
    • Armv8
    12559 views
    6 replies
    Latest over 8 years ago
    by Ajeesh
  • Answered

    Porting code From Cortex-A9 to Cortex-R7 0

    • Armv7
    • Cortex-A9
    • Arm Assembly Language (ASM)
    • Cortex-R7
    5484 views
    3 replies
    Latest over 8 years ago
    by Ajeesh
  • Answered

    Cortex M4, guidance for an i/o assembly tuition +1

    3728 views
    1 reply
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    trace debug functionality in ARM cortex M0 0

    9745 views
    2 replies
    Latest over 8 years ago
    by ayz
  • Answered

    Where can I find the device-specific JTAG instructions for Cortex-M3? +1

    • JTAG
    • Cortex-M3
    7209 views
    1 reply
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    On a watchpoint synchronous data abort, how do I determine the data address? +1

    • Armv7 Exception Model
    4262 views
    1 reply
    Latest over 8 years ago
    by jhickman
  • Answered

    Can I map the code/data memory as device memory +1

    4356 views
    3 replies
    Latest over 8 years ago
    by Peter Rielly Arm Employee Badge
  • Answered

    Porting code from Cortex-A9 to Cortex-A57 0

    • Cortex-A57
    • Cortex-A9
    • AArch64
    • Arm Assembly Language (ASM)
    • AArch32
    5623 views
    3 replies
    Latest over 8 years ago
    by Peter Rielly Arm Employee Badge
  • Answered

    Processor Modes in cortex-A57 +1

    • Cortex-A53
    • Cortex-A57
    • Cortex-A9
    • AArch64
    7834 views
    4 replies
    Latest over 8 years ago
    by daith
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Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
  • Armv8-A
  • Armv8-M
  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
  • Cortex-A7
  • Cortex-A8
  • Cortex-A9
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  • Cortex-M0
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  • Cortex-M4
  • Cortex-M7
  • Cortex-R
  • Interrupt
  • Linux
  • Memory
  • Memory Management Unit (MMU)
  • NEON
  • TrustZone