From my practical experience and study i have understood that ARM cortex M0 microcontrollers do not have the "trace debug" functionality whereas M3, M4 mcus have that . Although M0 mcus do have the other basic debug functionalities as per ARM coreSight technology .
Am i right ? would be grateful if anyone confirms
Yes, that's correct. Cortex-M0 supports debug features including: - Halting, single stepping, resume, restart - On the fly debug access to memories/peripherals - Up to 4 hardware breakpoint comparators - Software breakpoints using BKPT instruction - Up to 2 data watchpoint comparators - PC sampling using debug connection The debug connection can be based on JTAG or Serial Wire debug protocols. However, it doesn't support trace features as in Cortex-M3/M4 like: - Instruction trace with ETM - Selective data trace - Event trace (including exceptions) - Profiling trace - Instrumentation Trace (ITM) Please note in Cortex-M0+, we added an instruction trace support feature called Micro Trace Buffer (MTB). This provides limited instruction trace history using debug connection. But it doesn't have other trace features as in Cortex-M3/M4.