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Cortex A53 Out of Order?

Hi all,

Recently I encountered a problem. During CA53 bootup stage, PC will transfer a small executable program to the target platform via USB and then give the control to that program, which will first do PLL init. Strange point is that the PLL init part will affect USB transaction, which should have been completed. I've read the CA53 Manual, and found that it implements a in-order pipe line architecture. Does it mean instructions are executed sequentially? If yes, why the code placed after can affect the behavior before (single core, single thread)?

Any reply will be appreciated.

Thanks.

Best Regards.

Top replies

Hisenberg over 9 years ago in reply to wit_yuan +1 verified

But the code that changes clock is placed after USB part, that is we expect the USB transaction has been completed when Software trying to change its clock.

0 wit_yuan over 9 years ago

in my point , the usb runs with the clock.If you modify the pll,maybe clock is changed .
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+1 Hisenberg over 9 years ago in reply to wit_yuan

But the code that changes clock is placed after USB part, that is we expect the USB transaction has been completed when Software trying to change its clock.
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0 pizza over 9 years ago

It's very likely when the pll init starts, usb transfer part is not completely finished. Can you check again? If it's done by usb mass storage, it's easy to make mistake.
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