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Development with ARMv8a debug (and watchpoint) registers.

Grent

Hello folks,

I have two simple questions related to the debug exceptions on ARMv8.

  1. I expect the debug related registers such as DBGWCR, DBGWVR, DBGBCR and DBGBVR to be common for all processor cores on multi-core environment. Is this true? Some system registers such as SCTLR_EL1 are dedicated for each core; hence, to apply the same configuration for all cores, all the system registers on each core should be configured. However, in the case of debug registers, once developers set the breakpoint on a certain core, it should be effective for all cores, which means debug related registers are shared between all cores. 
  2. According to my understanding, once the debug state is enabled (e.g., using hardware JTAG debugger), the debug exceptions are not generated, so self-hosted debugging is not available. Then, is it impossible to develop some debug exception related code on the development board that is connected and debugged by using JTAG hardware debugger? Whenever I put the JTAG debugger to the development board, the MDSCR_EL1.HDE is always set and RO (OOSLSR_EL1.OSLK == 0), which disables the debug exceptions.

Thanks in advance for your help!

  • +1
    (1) No, each core has its own set of comparators, and they are configured independently on each core. You could set the same breakpoint on each, or you might want to set different breakpoints on different cores.

    Alternatively, you could use a software breakpoint. As these are instructions in memory, they aren't specific to one core.

    (2) In AArch64, you should still be able to use BRK instructions. As there are separate instructions HLT and BRK for the different types of debug.