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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3585 Questions
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  • Not Answered

    Feature Comparison ARM v8 series 0

    • Cortex-A72
    • Cortex-A57
    • Armv8-A
    • Cortex-A
    8192 views
    2 replies
    Latest over 7 years ago
    by techguyz
  • Answered

    Cortex-M23/M33 dynamic power +1

    • Cortex-M0
    • Cortex-M23
    • Cortex-M
    • TrustZone
    • Cortex-M33
    3693 views
    1 reply
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    aarch64 kernel using aarch32 page tables +2

    • Armv7-A
    • AArch64
    • AArch32
    7743 views
    2 replies
    Latest over 7 years ago
    by ashimida
  • Answered

    Looking for typical max frequency for Cortex-M CPUs 0

    • Cortex-M7
    • Cortex-M
    • Cortex-M4
    10942 views
    1 reply
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Interruptible Instructions on Cortex-M4 0

    • Cortex-M3
    • Cortex-M
    • Cortex-M4
    13083 views
    5 replies
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Not Answered

    Normal/Non-shareable/Non-cacheable memory note on Cortex-A5 TRM 0

    • L1
    • Cortex-A5
    • Cache
    • Cortex-A
    5485 views
    0 replies
    Started over 7 years ago
    by claudiu
  • Answered

    Bit-Banding. Only 1 bit at a time? 0

    • Cortex-M0
    • Cortex-M
    • C
    14495 views
    17 replies
    Latest over 7 years ago
    by 42Bastian Schick
  • Answered

    Information about ARM System control registers. +1

    • Cortex-A53
    • Cortex-A
    8701 views
    7 replies
    Latest over 7 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    How to access the system control register? +1

    • Cortex-A53
    • AArch64
    • Cortex-A
    • C
    • AArch32
    15261 views
    3 replies
    Latest over 7 years ago
    by 42Bastian Schick
  • Answered

    which register are dedicated for each MPCore in ARMv8-A architecture? 0

    • AArch64
    • Armv8-A
    • Cortex-A
    9249 views
    4 replies
    Latest over 7 years ago
    by 42Bastian Schick
  • Answered

    Port x86_64 Intrinsics to ARM64 equivalent +1

    • ifdef
    • else
    • x86
    • Arm Assembly Language (ASM)
    • Arm64
    • endif
    9799 views
    2 replies
    Latest over 7 years ago
    by aerodpe
  • Answered

    secure function call from none-secure side thread mode +1

    • TrustZone
    • Armv8-M
    • Memory
    8982 views
    1 reply
    Latest over 7 years ago
    by Miklos Balint Arm Employee Badge
  • Not Answered

    Calling None-Secure method directly from Secure world 0

    • TrustZone
    • Armv8-M
    • Block
    14437 views
    7 replies
    Latest over 7 years ago
    by Uma Ramalingam Arm Employee Badge
  • Answered

    GIC-400 controller virtual interrupt handling in VM and hypervisor +1

    • Cortex-A57
    • Generic Interrupt Controller
    • Cortex-A
    8283 views
    2 replies
    Latest over 7 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    efficient c programming 0

    • Cortex-R
    • Cortex-M
    • C
    5691 views
    4 replies
    Latest over 7 years ago
    by Wenchuan2018
  • Answered

    Using arm softcore in Kintex 7 board 0

    • Keil MDK
    • Cortex-M
    3816 views
    1 reply
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Trustzone FIQ latency measurement When security extension is enabled +1

    • Armv7-A
    • Cortex-A
    • Cortex-A7
    • TrustZone
    6912 views
    3 replies
    Latest over 7 years ago
    by 42Bastian Schick
  • Suggested Answer

    Where can i find resources about creating program on cortex-m7 from scratch? 0

    • Cortex-M7
    • Cortex-M
    2840 views
    1 reply
    Latest over 7 years ago
    by Sebastian Floss
  • Suggested Answer

    Which ARMv8 register controls cache partitioning 0

    • Cache
    • Armv8-A
    6929 views
    1 reply
    Latest over 7 years ago
    by Christopher Tory Arm Employee Badge
  • Answered

    Is a DMB required between loading BASEPRI and storing BASEPRI_MAX? 0

    • Cortex-M7
    • Armv7-M
    • Cortex-M
    7914 views
    6 replies
    Latest over 7 years ago
    by Ramzyo
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Topics being discussed in this forum
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