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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3592 Questions
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  • Answered

    EDSCR err bit set after a write to EDITR +1

    • Cortex-A57
    • AArch64
    • Armv8-A
    26530 views
    6 replies
    Latest over 5 years ago
    by kka
  • Not Answered

    Autodetect SDRAM size in uBoot Bootloader via ARMv7 processor exception handler 0

    • Armv7-A
    • Armv7 Exception Model
    24612 views
    3 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    Can I enable and use D-Cache with disabled MMU? 0

    29854 views
    4 replies
    Latest over 5 years ago
    by scopichmu
  • Not Answered

    cm7 and cm4 comparison 0

    2622 views
    1 reply
    Latest over 5 years ago
    by Pallavi boreddy
  • Answered

    obtaining cycle count on cortex m7 0

    7222 views
    3 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    M4 Deep Sleep 0

    • STM32 F4
    5593 views
    2 replies
    Latest over 5 years ago
    by AliRizaDenenPezevenk
  • Answered

    Permission fault, level 2 on MMU enable 0

    • EL1
    • Armv8-A
    • Memory Management Unit (MMU)
    24241 views
    1 reply
    Latest over 5 years ago
    by a.surati
  • Not Answered

    Changing prio of running IRQ triggers hardfault 0

    • Armv7-M
    • Cortex-M4
    • Interrupt
    2605 views
    0 replies
    Started over 5 years ago
    by Vinci
  • Not Answered

    Cortex-M4 0

    2382 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    Does MSR DAIF require ISB instruction? If no, why? 0

    • AArch64
    • Armv8-A
    25395 views
    2 replies
    Latest over 5 years ago
    by scopichmu
  • Not Answered

    Hart-i910 , what's real name of that MCU? 0

    4278 views
    3 replies
    Latest over 5 years ago
    by Andy Neil
  • Suggested Answer

    Tollchain for Cortex_M3 0

    2791 views
    1 reply
    Latest over 5 years ago
    by d.ry
  • Answered

    ACE MakeUnique Transaction 0

    21896 views
    2 replies
    Latest over 5 years ago
    by RajaAC
  • Not Answered

    What is the power consumption of a76 gpu and a77 gpu in normal state? 0

    • Cortex-A77
    • Cortex-A76
    19943 views
    0 replies
    Started over 5 years ago
    by Little_lan
  • Answered

    What can cause getting Cortex-A55 DSU P-Channel PACCEPT/PDENY signals fail? +1

    • Cortex-A55
    • Armv8-A
    • Cortex-A
    24477 views
    1 reply
    Latest over 5 years ago
    by Christopher Tory Arm Employee Badge
  • Answered

    MMU attributes implications on memory bandwidth +1

    23287 views
    1 reply
    Latest over 5 years ago
    by Christopher Tory Arm Employee Badge
  • Not Answered

    How to start cpu in ARMv7 baremetal environment? 0

    • Multiprocessor
    • Armv7-A
    • SMCCC
    22130 views
    4 replies
    Latest over 5 years ago
    by Levente
  • Answered

    how to handle lockup state in M33 +1

    14253 views
    14 replies
    Latest over 5 years ago
    by d.ry
  • Not Answered

    Cortex-M CMSIS Driver groups and related question 0

    • CMSIS
    3012 views
    0 replies
    Started over 5 years ago
    by d.ry
  • Not Answered

    Can code compiled for armv7-m run as it is on armv8-m? 0

    4231 views
    2 replies
    Latest over 5 years ago
    by Muhammad Usama Anjum
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