Arm Community
Arm Community
  • Site
  • User
  • Site
  • Search
  • User
Support forums
Support forums
Architectures and Processors forum
  • Jump...
  • Cancel
  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3586 Questions
Help a member

Have a question? If you can, please take a moment to also see if there is a question that you are able to answer.

  • Tags
  • RSS
  • More actions
  • Cancel
Other forums
  • AI forum

  • Architectures and Processors forum

  • Arm Development Platforms forum

  • Arm Development Studio forum

  • Arm Virtual Hardware forum

  • Automotive forum

  • Compilers and Libraries forum

  • Embedded and Microcontrollers forum

  • High Performance Computing (HPC) forum

  • Internet of Things (IoT) forum

  • Keil forum

  • Laptops and Desktops forum

  • Mobile, Graphics, and Gaming forum

  • Morello forum

  • Operating Systems forum

  • Servers and Cloud Computing forum

  • SoC Design and Simulation forum

  • SystemReady Forum

  • Suggested Answer

    Constant power supply with countdown timer triggered by a momentary switch 0

    3809 views
    1 reply
    Latest over 8 years ago
    by Jens Bauer
  • Answered

    Cache attribute write back/write allocate for Cortex-M4 +1

    • Cortex-M
    • Cortex-M4
    21260 views
    5 replies
    Latest over 8 years ago
    by dongyanxia
  • Answered

    CAT Cache Allocation Technology) and CDP (code and Data Prioritization) features support +1

    • Cache
    5401 views
    2 replies
    Latest over 8 years ago
    by 42Bastian Schick
  • Suggested Answer

    GIC order of completion of interrupts 0

    • Generic Interrupt Controller
    5960 views
    4 replies
    Latest over 8 years ago
    by josecm
  • Suggested Answer

    What's the relationship between exclusive access and memory cacheable in Cortex A53? 0

    • Cortex-A53
    • Armv8-A
    • Cortex-A
    6734 views
    3 replies
    Latest over 8 years ago
    by Emmy0
  • Not Answered

    A9 Code after vector table 0

    • Cortex-A9
    • Cortex-A
    • TrustZone
    9664 views
    8 replies
    Latest over 8 years ago
    by 42Bastian Schick
  • Answered

    Armv8 Memory Mapping 0

    • Cortex-A53
    • Cortex-A57
    • Armv8-A
    • Cortex-A
    8882 views
    7 replies
    Latest over 8 years ago
    by 42Bastian Schick
  • Not Answered

    Cortex A8 PLD 0

    • Cortex-A
    • Cortex-A8
    4264 views
    1 reply
    Latest over 8 years ago
    by 42Bastian Schick
  • Answered

    Which component will program TZASC? 0

    • Armv7-A
    • TrustZone
    9183 views
    5 replies
    Latest over 8 years ago
    by raghu.ncstate
  • Answered

    Suitable ARM processor for Traffic Lights Controller 0

    • Cortex-M
    • C
    5548 views
    2 replies
    Latest over 8 years ago
    by Nikl@s
  • Answered

    Why do we need atomicity in ARM Architecture? 0

    • Cortex-A
    • Armv8.1-A
    8999 views
    5 replies
    Latest over 8 years ago
    by daith
  • Answered

    Which component will program TZASC? 0

    • ACE
    • AXI
    • TrustZone
    • Armv8-M
    • Secure Transactions
    • Memory
    9093 views
    2 replies
    Latest over 8 years ago
    by Sahil
  • Suggested Answer

    Development in Assembly Language +1

    • Toolchain
    • Raspberry Pi
    • Cortex-A57
    • Raspberry Pi 3
    • Armv8
    • Arm Assembly Language (ASM)
    • C
    10104 views
    5 replies
    Latest over 8 years ago
    by AnthonyPaulO
  • Suggested Answer

    CMSIS FFT 0

    • Cortex-M3
    • Cortex-M
    6888 views
    3 replies
    Latest over 8 years ago
    by Thibaut ZEISSLOFF
  • Not Answered

    DS18B20 with MOSFET - reading temperature from multiple sensors on Raspberry Pi 0

    • Raspberry Pi
    7444 views
    2 replies
    Latest over 8 years ago
    by paulo.alcobia
  • Answered

    RNG (Random) on Cortex-M4 +1

    • Cortex-M
    • Cortex-M4
    8228 views
    2 replies
    Latest over 8 years ago
    by Amir
  • Answered

    Buffer Depth of UART in Arm cortex M7 processor +1

    • Cortex-M7
    • Cortex-M
    3588 views
    1 reply
    Latest over 8 years ago
    by Colin Campbell Arm Employee Badge
  • Suggested Answer

    how "Early Write Acknowledgement" is encoded on AXI AxCache ? equal to "bufferable"? 0

    • Armv7-A
    • AXI
    • Armv8-A
    7568 views
    2 replies
    Latest over 8 years ago
    by astonelin@gmail.com
  • Answered

    Systick precision +1

    • 15 (SysTick)
    5261 views
    3 replies
    Latest over 8 years ago
    by tridac
  • Answered

    v8.2 Atomic Instructions 0

    • ARMv8.2-A
    • AArch64
    • Armv8.1-A
    15829 views
    1 reply
    Latest over 8 years ago
    by Martin Weidmann Arm Employee Badge
<>
Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
  • Armv8-A
  • Armv8-M
  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
  • Cortex-A7
  • Cortex-A8
  • Cortex-A9
  • Cortex-M
  • Cortex-M0
  • Cortex-M3
  • Cortex-M4
  • Cortex-M7
  • Cortex-R
  • Interrupt
  • Linux
  • Memory
  • Memory Management Unit (MMU)
  • NEON
  • TrustZone