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Keil forum
The Keil Forum is an open forum where you may post questions and comments about Keil products.
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RE: Request for Help with Creating and using a Library in Keil
1 day ago
Morello forum
Morello is a research program led by Arm which could radically change the way we design and program processors in future, to enable better built-in security.
123
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RE: Morello Linux missing /lib/modules
28 days ago
Operating Systems forum
The latest forum discussions for all Arm technology relating to Operating Systems (OS)
267
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RE: Windows 11 24H2 on arm will refuse Cortex A72 ?
14 days ago
SoC Design and Simulation forum
The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
661
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RE: AXI4 transaction
2 hours ago
SystemReady Forum
The SystemReady forum is for questions on all aspects of the Arm SystemReady certification program including specifications (for example Base System Architecture - BSA), the Arm Certification Suite and the Pre-silicon SystemReady program.
10
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RE: SystemReady and Pre-Silicon SystemReady FAQ
10 months ago
中文社区论区
请注意,该论坛已不再活跃。如果您想使用我们的英语论坛,请访问 https://community.arm.com/support-forums/,并选择合适的论坛来提出您的问题。
703
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RE: ARMv8 异常向量表,Current EL,Lower EL 到底什么意思呢,求教
over 1 year ago
恩智浦汽车电子MCU讨论区博
4
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RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼
over 8 years ago
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CPU是cortex-a55, linux编译跑32bit,编译kernel时加了-march=armv7-a,应用程序使用的toolchain默认-march=armv8,编译出来的so库和应用程序能否在此linux版本上运行?
0
8964
views
1
reply
Latest
over 1 year ago
by
sword_i@sina.com
Not Answered
The arm developer can't download
0
1209
views
2
replies
Latest
over 1 year ago
by
fish man
Suggested Answer
CA55 snoop response behavior when cache line is clean
0
1384
views
2
replies
Latest
over 1 year ago
by
Christopher Tory
Not Answered
CHI problem
0
1191
views
1
reply
Latest
over 1 year ago
by
Christopher Tory
Answered
Looking for information on .vectors_ram in a scatter file.
+1
500
views
1
reply
Latest
over 1 year ago
by
Milorad Cvjetkovic
Not Answered
Assembly encoding that triggers an exception in both the A32 and T32 instruction set
0
843
views
2
replies
Latest
over 1 year ago
by
Rosario
Answered
AXI3: Out of order write transaction
0
2069
views
4
replies
Latest
over 1 year ago
by
alan.k.yang
Suggested Answer
FVP_RevC-AEMv8A (cache misses)
0
AEMv8 FVP
Cache coherency
Cache Architecture
Simulation Models
Fixed Virtual Platforms (FVPs)
1645
views
5
replies
Latest
over 1 year ago
by
vstehle
Suggested Answer
About the PrimeCell®︎ DMA Controller (PL080) internal FIFOs.
0
PrimeCell DMA Controller (PL080)
1674
views
5
replies
Latest
over 1 year ago
by
Colin Campbell
Suggested Answer
AHB5: performing a burst transfer with HBURST=SINGLE and HTRANS=NONSEQ.
0
AHB5
AHB
1741
views
1
reply
Latest
over 1 year ago
by
Colin Campbell
Not Answered
Arm GNU Toolchain 11.3.Rel1 missing gcov_* symbols
0
Toolchain
GCC
Compilers
GNU Arm
GNU Toolchain
2086
views
1
reply
Latest
over 1 year ago
by
chao an
Not Answered
How to change from gbm(drm) backend to triple buffering?
0
1631
views
2
replies
Latest
over 1 year ago
by
John.Kim
Answered
How to determine some performance budgets in PA
0
Android
Performance Advisor
Arm Mobile Studio
2747
views
8
replies
Latest
over 1 year ago
by
Jinho Mang
Not Answered
What is the difference of l3d_cache_refill and ll_cache_miss_rd?
0
958
views
0
replies
Started
over 1 year ago
by
tao.wang
Not Answered
ARM GCC is missing some builtins for ARMv7-M Thumb
0
GCC
Cortex-M
Cortex-M4
534
views
0
replies
Started
over 1 year ago
by
guberti
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