But from TF-A System Design https://trustedfirmware-a.readthedocs.io/en/latest/design/reset-design.html#general-reset-code-flow seems the Non-trusted ROM is not necessary, because it can handle the case that all CPUs start at the same address(typically address 0), so, my question is, why there are two ROM in N1SDP SoC? Can you give us a full picture of boot flow on N1SDP?
Thanks a lot!
Hi there, I have moved your question to the Architectures and Processors forum. Many thanks.
These memories are in the SoC, but are not used by the firmware.
Code resides in QSPI flash, then BL1 is copied to trusted SRAM, and boot proceeds from there.
Thanks a lot for your reply.
But I am still confused about the Non-trusted ROM. Is it a special design in the N1SDP SoC? Or a typical design of ARM server based SoC?
It seems having only one secure ROM is sufficient for the SoC, I doubt whether the Non-trusted ROM is not used in N1SDP SoC.
I don't know for sure, but I agree with you.
The N1SDP was an early development platform, and so likely added features that turned out not to be necessary/used (such as the on-chip ROMs).