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In case of AXI4 lite protocol,what is the relation between BValid signal and Wvalid signal?

In case of AXI4 lite protocol,whether BValid should be asserted before WVALID signal deassertion? what is the legal case?

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  • It doesn't make a difference which AXI protocol you are looking at, you cannot provide a write response until AFTER the final write data transfer has completed (WVALID and WREADY both sampled high on ACLK rising).

    For AXI3, BVALID can only be asserted after the final write data transfer (WLAST high) has completed.

    For AXI4, BVALID can only be asserted after both the AW transfer and the final write data transfer have completed.

    For AXI4-Lite, BVALID can only be asserted after both the AW and W transfers have completed (there will only be 1 write data transfer).

    So BVALID can never be asserted until after the final write data transfer's handshake has completed.

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  • It doesn't make a difference which AXI protocol you are looking at, you cannot provide a write response until AFTER the final write data transfer has completed (WVALID and WREADY both sampled high on ACLK rising).

    For AXI3, BVALID can only be asserted after the final write data transfer (WLAST high) has completed.

    For AXI4, BVALID can only be asserted after both the AW transfer and the final write data transfer have completed.

    For AXI4-Lite, BVALID can only be asserted after both the AW and W transfers have completed (there will only be 1 write data transfer).

    So BVALID can never be asserted until after the final write data transfer's handshake has completed.

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