"I want to create simple tasks to send address and data from the master to the slave without any burst-length violations, making sure to include wstrb.
wstrb
When an AXI4 master and AXI3 slave are connected via an NoC bus and perform transactions, the AXI4 master is set with awburst = 1, awlen = 1, awsize = 2, and wdata is 64-bit. Meanwhile, the AXI3 slave is configured to receive inputs with awburst = 1, awlen = 1, awsize = 2, and wdata is fixed at 32-bit.
awburst = 1
awlen = 1
awsize = 2
wdata
I think that if the master sends a 64-bit transfer in one burst, and the slave receives it as two 32-bit transfers, there shouldn’t be any protocol issues. However, GPT suggests that the awlen of the AXI4 master and AXI3 slave must match to avoid burst-length violations. If I make awlen match, it will change the original behavior I intended.
awlen
In what cases does a burst-length violation occur?"
When any interconnect is used to connect a 64-bit source to a 32-bit destination, it has to downsize the width of the transaction, resulting in a single beat transactions being converted into a 2-beat transaction.
So no issues here as far as I can see, other than "GPT" making some strange statements.
For clarity, what is "GPT" ?
I mean ChatGPT.
"In a single beat transactions being converted into a 2-beat transaction" Would you help me any reference timing diagram for understand more clarify?
I'm not clear about how bready and bvalid works in Master and Slave?
sorry my waveform is very small, so I make a link. https://imgur.com/a/CfYaHdj
I sent a 64bits data 'hcafe_c8c8_a5a5_1f1f to 32bit data width slave. but slave only recognized a5a5_1f1f.