Behavior of the AHB5 subordinate when the first beat of the AHB burst causes an error response while the second beat is a BUSY

Consider an INCR4 burst below:

HADDR :           0x0            0x4     0x4     0x4     0xX 0xX
HTRANS :         NONSEQ  BUSY BUSY BUSY IDLE IDLE

HRESP:            OKAY         ERR   ERR OKAY   OKAY

HREADYOUT:  0x1             0x0     0x1   0x1       0x1

In the example above, the first beat of the AHB burst has an error while the second beat is a BUSY from the manager. The protocol says that the subordinate  MUST respond with an OKAY when the manager sends BUSY. However, in the example below, since the first beat caused a two step error response, I am not sure how it will respond to with an OKAY to the BUSY without terminating the two step error response (i.e. send only one cycle of ERR and the next cycle would have to be OKAY in response to the BUSY).

What is the correct behavior of the AHB5 subordinate when the first beat of the AHB burst causes an error response while the second beat is a BUSY from the master?

Thanks