Hi all, I'm a newbie in SoC designs and architecture and also in DMA Controllers. But I started to study a lot of documentations already, including the PrimeCell® DMA Controller (PL080) technical reference manual. It is not clear to me what is the advantage of having the 4 words internal FIFOs. Can someone clarify that for me? Thanks in advance. :)
Indeed. I just saw they are not dedicated... the D and S bits can be set to the same value, per channel. I hadn't thought about configuring a single port for a single channel, but it is indeed possible... I just can't understand how is this more efficient... ? I mean, by using both ports the transfer will finish roughly twice as faster, right? So the transfer will be faster and you will have both ports free again.
You're saying it is best to always use the same port (for read and write) for each channel?
The PL080 was designed with 2 AHB interfaces with the intention that each interface would be getting used by different channels to better support the 8 available channels, so using the FIFOs to temporarily store data between reads and writes via one interface is the intended use case.
As discussed, you can use different interfaces for the read and write operations, and not use the FIFOs, but I have a vague recollection that this isn't as efficient in terms of bus cycles as using the FIFOs and doing bursts of reads and writes.
The best way to see for sure is to try simulating it and see what results you get.