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About the PrimeCell®︎ DMA Controller (PL080) internal FIFOs.


Hi all, I'm a newbie in SoC designs and architecture and also in DMA Controllers. But I started to study a lot of documentations already, including the PrimeCell® DMA Controller (PL080) technical reference manual. It is not clear to me what is the advantage of having the 4 words internal FIFOs. Can someone clarify that for me? Thanks in advance. :)

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  • I'd guess the reason is the same reason why we have FIFOs anywhere; to provide temporary buffering.

    So FIFOs in a DMA controller allow you to read in a burst of data from a DMA source and then write out a burst of data to the DMA destination. If you didn't have the FIFOs, the DMA accesses would be a series of single reads and single writes, so not as good for performance as bursts of transfers.

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  • I'd guess the reason is the same reason why we have FIFOs anywhere; to provide temporary buffering.

    So FIFOs in a DMA controller allow you to read in a burst of data from a DMA source and then write out a burst of data to the DMA destination. If you didn't have the FIFOs, the DMA accesses would be a series of single reads and single writes, so not as good for performance as bursts of transfers.

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