Is it possible to directly connect an AXI4-Lite master with AXI4 Slave?

Did you have a read at section B1.1.1, as this describes what AXI4-lite does implement, and so mostly tells you what to set all the unsupported signals to ?

Going down your list...

AWID (and ARID) - IDs are used to support multiple outstanding transactions, so as AXI4-lite does not support these, the ID signals are not used. Therefore AWID and ARID can be set to any static value you want (and the RID and BID responses ignored).

AWLEN (and ARLEN) - B1.1.1 tells you that all AXI4 transactions are length 1, so AWLEN=8'b00000000

AWSIZE (and ARSIZE) - B1.1.1 tells you that all accesses are to the full width of the data bus, so 3'b010 (32-bit) or 3'b011 (64-bit) depending on your implemented data bus width

AWBURST (and ARBURST) - with a burst length of 1, the burst type should be the simplest INCR (2'b01)

AWLOCK (and ARLOCK) - B1.1.1 says drive to 1'b0 as no exclusive transfers supported

AWCACHE (and ARCACHE) - B1.1.1 says drive to non-modifiable, non-bufferable, 4'b0000

AWPROT (and ARPROT) - driven by the AXI-lite source outputs

AWQOS (and ARQOS) - too complex for AXI4-lite, so any static value, either a default 4'b0000, or if driving any arbitration logic choose a value to suit this source's priority so it can compete correctly with other transfer sources.

WLAST - we know the transaction will always be 1 transfer long, so drive to 1'b1

RLAST - ignore as we know the incoming read transaction must have RLAST high

Please do have a read at section B1.1.1 as this would have answered most of the above questions, and section A9.3 for sensible default values where none are mandated in B1.1.1.

Did you have a read at section B1.1.1, as this describes what AXI4-lite does implement, and so mostly tells you what to set all the unsupported signals to ?

Going down your list...

AWID (and ARID) - IDs are used to support multiple outstanding transactions, so as AXI4-lite does not support these, the ID signals are not used. Therefore AWID and ARID can be set to any static value you want (and the RID and BID responses ignored).

AWLEN (and ARLEN) - B1.1.1 tells you that all AXI4 transactions are length 1, so AWLEN=8'b00000000

AWSIZE (and ARSIZE) - B1.1.1 tells you that all accesses are to the full width of the data bus, so 3'b010 (32-bit) or 3'b011 (64-bit) depending on your implemented data bus width

AWBURST (and ARBURST) - with a burst length of 1, the burst type should be the simplest INCR (2'b01)

AWLOCK (and ARLOCK) - B1.1.1 says drive to 1'b0 as no exclusive transfers supported

AWCACHE (and ARCACHE) - B1.1.1 says drive to non-modifiable, non-bufferable, 4'b0000

AWPROT (and ARPROT) - driven by the AXI-lite source outputs

AWQOS (and ARQOS) - too complex for AXI4-lite, so any static value, either a default 4'b0000, or if driving any arbitration logic choose a value to suit this source's priority so it can compete correctly with other transfer sources.

WLAST - we know the transaction will always be 1 transfer long, so drive to 1'b1

RLAST - ignore as we know the incoming read transaction must have RLAST high

Please do have a read at section B1.1.1 as this would have answered most of the above questions, and section A9.3 for sensible default values where none are mandated in B1.1.1.