Hallo ARM experts,
while using CMSIS-Driver EMAC the configuration of AHB1 clock according to the description of EMAC_STM32H7xx.c should be setup below 200 MHz. However, the core of stm32H743 microcontroller can work until 480 Mhz. And the AHB can max. be 240 MHz. I wonder why it is required to setup below 200 Mhz. Are there any systematic problems if we configure the bus speed up to 240 Mhz? For my project, it is beneficial if I can have a high speed, because the fast handle of ethernet message is for my project meaningful.
best wishes,
Hello,We have investigated your question about EMAC driver from Keil_STM32H7xx_DFP regarding setup AHB clock to 200MHz or lower.From documentation (STM32H742x datasheet) it is clear AHB clock frequency can be reached up to 240 MHz with operating conditions VOS0.We made brief test on hardware with EMAC_STM32H7xx.c driver where setting AHB bus speed was 240MHz and driver works as expected.Our plan is to correct limitation about AHB clock from 200 MHz to 240 MHz in EMAC_STM32H7xx.c driver in next release version.Regards, Ziga
Thank you very much for your test. Maybe this limitation was for the old version of STM32h7. Because I came across an old datasheet of STM32H743I DS12110 Rev 5 (new one is Rev 9). The old core can only up to 400Mhz and Therefore the driver for it stays on 200 MHz. :)