CMSIS-Driver EMAC clock below 200 MHz

Hallo ARM experts,

while using CMSIS-Driver EMAC the configuration of AHB1 clock according to the description of EMAC_STM32H7xx.c should be setup below 200 MHz. However, the core of stm32H743 microcontroller can work until 480 Mhz. And the AHB can max. be 240 MHz.  I wonder why it is required to setup below 200 Mhz. Are there any systematic problems if we configure the bus speed up to 240 Mhz? For my project, it is beneficial if I can have a high speed, because the fast handle of ethernet message is for my project meaningful.

best wishes,