PLL Locking Range

Hello all,

I have written a code with PLL Initialization from 12MHz external crystal
oscillator, configured the PLL to lock to 288Mhz with M and N values as 12 and 1.
FCCO = (2 * M * Fin)/N = (2 * 12 * 12MHz)/1 = 288MHz
CCLK = FCCO/CCLKDIV = 288/6 = 48 MHz

Configured the CPU Clock divider to 6 and USB clock Divider to 6, so that the CPU
runs at 48MHz. The code for it is shown below.

void ConfigurePLL ( void )
{ DWORD MValue, NValue;

if ( PLLSTAT & (1 << 25) ) { PLLCON = 1; /* Enable PLL, disconnected */ PLLFEED = 0xaa; PLLFEED = 0x55; }

PLLCON = 0; /* Disable PLL, disconnected */ PLLFEED = 0xaa; PLLFEED = 0x55;

SCS |= 0x20; /* Enable main OSC */ while( !(SCS & 0x40) ); /* Wait until main OSC is usable */

CLKSRCSEL = 0x1; /* select main OSC, 12MHz, as the PLL clock source */

PLLCFG = PLL_MValue | (PLL_NValue << 16); PLLFEED = 0xaa; PLLFEED = 0x55;

PLLCON = 1; /* Enable PLL, disconnected */ PLLFEED = 0xaa; PLLFEED = 0x55;

CCLKCFG = CCLKDivValue; /* Set clock divider */

#if USE_USB USBCLKCFG = USBCLKDivValue; /* usbclk = 288 MHz/6 = 48 MHz */ #endif

while ( ((PLLSTAT & (1 << 26)) == 0) ); /* Check lock bit status */

MValue = PLLSTAT & 0x00007FFF; NValue = (PLLSTAT & 0x00FF0000) >> 16; while ((MValue != PLL_MValue) && ( NValue != PLL_NValue) );

PLLCON = 3; /* enable and connect */ PLLFEED = 0xaa; PLLFEED = 0x55; while ( ((PLLSTAT & (1 << 25)) == 0) ); /* Check connect bit status */ return;
}

Now i had made the below line from
SCS |= 0x20; /* Enable main OSC */
to
SCS |= 0x00; /* Disable main OSC */
and made the clock source to PLL as Internal 4Mhz Oscillator.
CLKSRCSEL = 0x0; /* select main OSC, 12MHz, as the PLL clock source */

So now the PLL calculations with the same PLL M and N values are
FCCO = (2 * 12 * 4MHz)/1 = 96MHz
CCLK = 96/6 = 16MHz
But the PLL output frequency should be in the range of 275 to 500MHz. Here it is
96Mhz so it should not lock.
But my code is working at 16Mhz with PLL enabled and is working fine.
Can the PLL be locked with that range?

Can anyone give me an explanation.