Hello, I write code in MDR-ARM for any STM32F CPU and need send data over GPIO output on high speed and precise timing. For the sent I want to use inline asm code. For timig I use nop and /or b .+2 assembler instruction , but commplier defaut optimize and remoce seemingly useless nop or b .+2 instruction.
How disable this optimalizsation for specific asm code?
You'd be better off using GPIO+DMA+TIM, to pace data accurately from a pattern buffer.
Write your code in the startup_stm32xxxx.s file, you have more control there.
DMA and timer in PWM mode I use now, but the RAM consumption is 96byte one timer DMA , Therefore I am looking for a more economical solution.
>Write your code in the startup_stm32xxxx.s file This have por code portability ,etc.
>>This have por code portability ,etc.
And in-line assembly doesn't? Tuning code for RAM based predictable timing, and disabling interrupts, seems like a lot of device/implementation specific coding.
Coding in a .s file provides for control over alignment, registers, and prologue/epilogue