fcheck do not work(MDK 4.70 NAND)

driver:

#include <File_Config.h>
#include <string.h>
#include <LPC24xx.h>
#include "NAND_LPC24xx.h"

//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
// <o0>Chip select used for NAND <0x00=> CS0
//                               <0x01=> CS1
//                               <0x02=> CS2
//                               <0x03=> CS3

#define NAND0_HW_CS  0x01

//------------- <<< end of configuration section >>> -----------------------

/* EMC data bus */
#define EMC_NAND_BASE  (0x80000000 + 0x1000000 * NAND0_HW_CS)
#define EMC_ALE_ADDR    0x00080000
#define EMC_CLE_ADDR    0x00040000//0x00100000  changed by wangyuan, 20140406

#define EMC_DATA8 *((volatile U8 *)(EMC_NAND_BASE))
#define EMC_ADDR8 *((volatile U8 *)(EMC_NAND_BASE + EMC_ALE_ADDR))
#define EMC_CMD8  *((volatile U8 *)(EMC_NAND_BASE + EMC_CLE_ADDR))


#define PIN_RB   (1<<6)//(1 << 12) changed by wangyuan, 20140406  /* MCB2400 */


/*----------------------------------------------------------------------------
 *      NAND driver prototypes
 *---------------------------------------------------------------------------*/
static U32 Init         (NAND_DRV_CFG *cfg);
static U32 UnInit       (NAND_DRV_CFG *cfg);
static U32 PageRead     (U32 row, U8 *buf, NAND_DRV_CFG *cfg);
static U32 PageWrite    (U32 row, U8 *buf, NAND_DRV_CFG *cfg);
static U32 BlockErase   (U32 row, NAND_DRV_CFG *cfg);


/*------------------------------------------------------------------------------
  NAND Device Driver Control Block
 *----------------------------------------------------------------------------*/
const NAND_DRV nand0_drv = {
  Init,
  UnInit,
  PageRead,
  PageWrite,
  BlockErase,
};

driver:

#include <File_Config.h>
#include <string.h>
#include <LPC24xx.h>
#include "NAND_LPC24xx.h"

//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
// <o0>Chip select used for NAND <0x00=> CS0
//                               <0x01=> CS1
//                               <0x02=> CS2
//                               <0x03=> CS3

#define NAND0_HW_CS  0x01

//------------- <<< end of configuration section >>> -----------------------

/* EMC data bus */
#define EMC_NAND_BASE  (0x80000000 + 0x1000000 * NAND0_HW_CS)
#define EMC_ALE_ADDR    0x00080000
#define EMC_CLE_ADDR    0x00040000//0x00100000  changed by wangyuan, 20140406

#define EMC_DATA8 *((volatile U8 *)(EMC_NAND_BASE))
#define EMC_ADDR8 *((volatile U8 *)(EMC_NAND_BASE + EMC_ALE_ADDR))
#define EMC_CMD8  *((volatile U8 *)(EMC_NAND_BASE + EMC_CLE_ADDR))


#define PIN_RB   (1<<6)//(1 << 12) changed by wangyuan, 20140406  /* MCB2400 */


/*----------------------------------------------------------------------------
 *      NAND driver prototypes
 *---------------------------------------------------------------------------*/
static U32 Init         (NAND_DRV_CFG *cfg);
static U32 UnInit       (NAND_DRV_CFG *cfg);
static U32 PageRead     (U32 row, U8 *buf, NAND_DRV_CFG *cfg);
static U32 PageWrite    (U32 row, U8 *buf, NAND_DRV_CFG *cfg);
static U32 BlockErase   (U32 row, NAND_DRV_CFG *cfg);


/*------------------------------------------------------------------------------
  NAND Device Driver Control Block
 *----------------------------------------------------------------------------*/
const NAND_DRV nand0_drv = {
  Init,
  UnInit,
  PageRead,
  PageWrite,
  BlockErase,
};

In the RL-ARM User's Guide for fcheck (http://www.keil.com/support/man/docs/rlarm/rlarm_fcheck.htm), this is not stated explicitly, but you can see that only EFS drives are allowed as input parameter and attempt to check the FAT media will result in error.