Weird SPSR behaviour

I was trying to write a register context saving/restoring when I came across a weird behaviour.

My code (sorry, tried to format tens of times, but the editor WANTS to make asm a table):

asm volatile (
...
"pop {r0 - r3}"
"push {r0 - r3}"
"mov r0, r3"
"bl dbg_out" - outputs 60000013
"pop {r0 - r3}"
"msr cpsr_fsxc, r2"
"@dsb"
"@isb"
"msr spsr_fsxc, r3" - set value
"@dsb"
"@isb"
"mov lr, r1"
"mov sp, r0"
"push {r0 - r4, lr}"
"mov r0, lr"
"bl dbg_out"
"mov r0, sp"
"bl dbg_out"
"mrs r2, cpsr"
"mrs r3, spsr" - read value
"mov r0, r2"
"bl dbg_out"
"mov r0, r3" - outputs 00000002
"bl dbg_out"
...
);

When the exception is returned from, the calling function:

asm volatile ("svc #0\n\t");

    msg = "returned from SVC\r\n";

    serial_io.put_string(msg, util_str_len(msg)+1);

    asm volatile (

"mrs %[retreg], cpsr\n\t"
:[retreg] "=r" (tmp1) ::

    );

    msg = "cpsr = ";

    serial_io.put_string(msg, util_str_len(msg)+1);

    util_word_to_hex(scratchpad, tmp1);

    serial_io.put_string(scratchpad, 9);

    serial_io.put_string("\r\n", 3);

outputs "returned from SVC" and "cpsr = 60000013".

Why the "00000002"? the barriers don't seem to have any effect.

Parents
  • I think that 'bl dbg_out' is free to change r0-r3, r12 and lr.

    Popping and then pushing r0-r3 looks strange to me; probably because a LDM sp,{r0-r3} would do the job just as well, but save a bunch of clock cycles.

    I recommend to avoid pushing the values back onto the stack; if you need to change a single register, I think it would be better to just do an indexed store (STR rN,[sp,#offset])

Reply
  • I think that 'bl dbg_out' is free to change r0-r3, r12 and lr.

    Popping and then pushing r0-r3 looks strange to me; probably because a LDM sp,{r0-r3} would do the job just as well, but save a bunch of clock cycles.

    I recommend to avoid pushing the values back onto the stack; if you need to change a single register, I think it would be better to just do an indexed store (STR rN,[sp,#offset])

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