Hello to all AHB experts,
I have some question about AHB-Lite interconnection.
If I want to build 2 masters share 1 slave systems. I add a arbiter in the interconnect circuit, so that only one master could access the slave at a time.
My question is how the slave response mux to the masters?
1. If (HTRANS1==NONSEQ) for master1, (HTRANS2==NONSEQ) for master2, only a master will see the HREADY response at data phase whose grant by the arbiter?
2. If (HTRANS1==ILDE ) for master1, (HTRANS2==IDLE ) for master2, two masters will see the HREADY response at data phase at a time?
3. If (HTRANS1==NONSEQ) for master1, (HTRANS2==IDLE ) for master2, two masters will see the HREADY response at data phase at a time?
Thanks a lot.
Thanks for your clear description.