Is it possible to configure L1 and L2 cache in Carbon SOC designer?

Hi,

I want to evaluate different cache settings such as block size, way size, replacement policy, prefetch distance, and prefetch block numbers etc for all cache levels so that I can determine the best settings for a specific set of applications. Is it possible to do this in Carbon SOC designer?

I have read pl310 cache controller technical reference and known that for L2 cache I can adjust the AUX and Prefetch control registers, to affect some configurations for prefetch offset etc on real hardware and on Carbon SOC designer. However, I would like to explore a greater range of settings than seem to be available in the pl310 controller technical reference, as such I would like to know if it is possible to explore cache performance for those additional settings using Carbon SOC designer.

If this is not possible would you know of a cache simulator which may satisfy this purpose?

Thanks in advance!

Ting