Hey,
Reading CNTPCT and system counter in different cores results in different results. These values should be common across all the cores. Why is the difference?
Thanks,
Gowthami
Hi,
Based on the information provided, I don't know why. I'd expect to see the same value from all the cores too.
If you can provide some more detailed information about how you are observing this behaviour, someone might be able to suggest something. For example:
Regards
MarkN.
Curiosity forced me to try this in DS-5, with Linux booted on a Juno board. [All cores are halted in debug state at EL1 Non Secure, AArch64].
When I refresh debugger's register view I can see CNTPCT_EL0 reflecting the incrementing System Timer. I see the same values reflected in all core's registers (or at least as close to the same as the delay in refreshing one view after another) will allow.
So reassuringly this test matches the expected behaviour.
That's confusing, it's not what I see on my board.
Although you haven't said what the magnitude of the difference is that's concerning you.
A couple of thoughts:
Hi Mark,
I tried reading the values in DS-5.
Reading CNTPCT_EL0 register in EL2 (Hypervisor mode) in AArch64 state results in this value. Also, I observed a similar behaviour when I read the memory mapped CNTCV value (0x2a800000).
Secondary core reports a lower value than the primary core as time goes by.