Hello everyone,
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ARM® Generic Interrupt Controller - Architecture version 2.0
PAGE- 38
In GICv2, when using a software model with the GICC_CTLR.AckCtl bit set to 0, separate registers
are used to manage Group 0 and Group 1 interrupts, as follows:
— GICC_IAR, GICC_EOIR, and GICC_HPPIR for Group 0 interrupts
— GICC_AIAR, GICC_AEOIR, and GICC_AHPPIR for Group 1 interrupts.
3.2.1 Priority drop and interrupt deactivation
Page 39
Note:
In a GICv2 implementation that includes the Security Extensions:
• GICC_AEOIR is an alias of the Non-secure copy of GICC_EOIR
• GICC_AIAR is an alias of the Non-secure copy of GICC_IAR
• GICC_AIAR and GICC_AEOIR are Secure registers, meaning they are accessible only by Secure accesses
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My questions
1) I am a bit confused here. as i read from the above mentioned doc Secure interrupts can access both the groups(0&1), whereas Non-secure interrupts can access only Group1.
2) In page 38 : GICC_IAR, GICC_EOIR, and GICC_HPPIR are for group0, which means they are secured registers and can be accessed by only secure interrupts. and
GICC_AIAR, GICC_AEOIR, and GICC_AHPPIR are for Group 1 interrupts which can be accessed by both secure & Non-Secure.
3) but in PAGE 39: it is mentioned that "GICC_AIAR and GICC_AEOIR are Secure registers, meaning they are accessible only by Secure accesses".
Can anyone please clear my confusion.
4) "GICC_AEOIR is an alias of the Non-secure copy of GICC_EOIR" --> In this case if GICC_AEOIR is the ALIAS of Non-Secure Copy of GICC_EOIR, then what is the Non-Secure copy of GICC_EOIR..?
Questions what ever i have asked are as per my understanding, Please correct me if I am wrong.
Thanks in advance.,
Rakesh.
The note in section 3.2 ("In GICv2, when using a software model with....") I agree is confusing.
On (1): If an implementation includes the GIC Security Extensions (TrustZone support), software running in Secure state can handle both Group 0 and 1 interrupts. Software running in Non-secure state can only handle Group 1 interrupts.
On (2): In Secure state, when AckCtl==0, the "aliased" registers provide a Non-secure view:
GICC_IAR, GICC_EOIR, and GICC_HPPIR are used for Group 0 interrupts.
GICC_AIAR, GICC_AEOIR, and GICC_AHPPIR are used for Group 1 interrupts (when AckCtl==0).
In Non-seccure state, GICC_IAR, GICC_EOIR, and GICC_HPPIR are used for Group 1 interrupts.
On (3): The "aliased" registers are only accessible in Secure state because they simply aren't needed in Non-secure state. Secure state can see both groups, so it is helpful to have two sets of registers. Non-secure state can only see one group, and therefore only needs one set of the registers.
On (4): It might be more accurate to say a "a Secure write to GICC_AEOIR is equivalent to a Non-secure write to GICC_EOIR".
Hi Martin,
Thanks a lot for sparing your valuable time.
I came to a conclusion based on your explanation. Can you please look in to it.
1) In secure state software can handle both group0 & group1 interrupts, so we provide separate set of registers("aliased") to handle group1 interrupts.
From this can we say that in secure state, in order to handle Non-secure interrupts we use ALIASED registers. (am i right.?).
2) In Non-secure state as the software can see only group1, we had only single set of register.(Register naming is same as the ones which we use for group0 in secure state).
Am i correct.?
Thanks,
Yes
many thanks martin..!!