Hello everyone,
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------
ARM® Generic Interrupt Controller - Architecture version 2.0
PAGE- 38
In GICv2, when using a software model with the GICC_CTLR.AckCtl bit set to 0, separate registers
are used to manage Group 0 and Group 1 interrupts, as follows:
— GICC_IAR, GICC_EOIR, and GICC_HPPIR for Group 0 interrupts
— GICC_AIAR, GICC_AEOIR, and GICC_AHPPIR for Group 1 interrupts.
3.2.1 Priority drop and interrupt deactivation
Page 39
Note:
In a GICv2 implementation that includes the Security Extensions:
• GICC_AEOIR is an alias of the Non-secure copy of GICC_EOIR
• GICC_AIAR is an alias of the Non-secure copy of GICC_IAR
• GICC_AIAR and GICC_AEOIR are Secure registers, meaning they are accessible only by Secure accesses
------------------------------------------------------------------------------------------------------------------------------------------------------------------------
My questions
1) I am a bit confused here. as i read from the above mentioned doc Secure interrupts can access both the groups(0&1), whereas Non-secure interrupts can access only Group1.
2) In page 38 : GICC_IAR, GICC_EOIR, and GICC_HPPIR are for group0, which means they are secured registers and can be accessed by only secure interrupts. and
GICC_AIAR, GICC_AEOIR, and GICC_AHPPIR are for Group 1 interrupts which can be accessed by both secure & Non-Secure.
3) but in PAGE 39: it is mentioned that "GICC_AIAR and GICC_AEOIR are Secure registers, meaning they are accessible only by Secure accesses".
Can anyone please clear my confusion.
4) "GICC_AEOIR is an alias of the Non-secure copy of GICC_EOIR" --> In this case if GICC_AEOIR is the ALIAS of Non-Secure Copy of GICC_EOIR, then what is the Non-Secure copy of GICC_EOIR..?
Questions what ever i have asked are as per my understanding, Please correct me if I am wrong.
Thanks in advance.,
Rakesh.
Yes
many thanks martin..!!