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instruction equivalent to movw,movt with position independent and PC relocatable.

Using movw and movt to load a label address into a register in Arm 32 architecture. but this is not position independent  code.

movw r1, #:lower16:ASM_NAME(forkx)
movt r1, #:upper16:ASM_NAME(forkx)

As per the manual also it specifies that it will be resolved at the link time.

Need a position independent code, so as per the manual adr, adrl can be used, but getting below error:

../asm-arm/unix_arm.S:115:1: error: unsupported relocation on symbol
adr r1, __be_forkx

../asm-arm/unix_arm.S:60:1: error: invalid instruction, did you mean: adr?
adrl r1, __be_forkx

it seems label can not be used in the aarch32, it is fine in aarch64 and works as intendent.

is the usage of adr command is improper? Is there a way to achieve this in aarch32?  is there any equivalent command that can be used?

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  • this may not satisfy 4K condition

    Apologies. 4K is under T32. For e.g., the A32 adr instruction "x: add r0,pc,#0x20000000" calculates the address of a location 512MB above pc (i.e., r0 = x+8+0x20000000). The linked article describes how valid offsets are calculated.

    label __be_forkx is there in another link library

    And is that library statically linked with your application? or dynamically? I am trying to understand how adrp worked here but adr fails. 

    We need to generate PIC enabled code to make sure that addresses not tracked and to avoid the same address in every invocation of the binary.

    I did not understand this. Oh, may be it is address space randomization?

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  • this may not satisfy 4K condition

    Apologies. 4K is under T32. For e.g., the A32 adr instruction "x: add r0,pc,#0x20000000" calculates the address of a location 512MB above pc (i.e., r0 = x+8+0x20000000). The linked article describes how valid offsets are calculated.

    label __be_forkx is there in another link library

    And is that library statically linked with your application? or dynamically? I am trying to understand how adrp worked here but adr fails. 

    We need to generate PIC enabled code to make sure that addresses not tracked and to avoid the same address in every invocation of the binary.

    I did not understand this. Oh, may be it is address space randomization?

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