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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3581 Questions
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  • Not Answered

    ADC Trigger 0

    3141 views
    1 reply
    Latest over 5 years ago
    by Andy Neil
  • Answered

    Reading ETB from software 0

    • CoreSight ETB11
    • Cortex-A9
    31759 views
    7 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    Does the ThunderX CP processor support AArch32? 0

    • AArch64
    • AArch32
    19908 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    How to calculate the return address of an exception? 0

    21968 views
    3 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    hardfault error 0

    • Cortex-M4
    11339 views
    5 replies
    Latest over 5 years ago
    by Andy Neil
  • Not Answered

    Hardfault error on callback 0

    • 3 (HardFault)
    • Cortex-M4
    4775 views
    2 replies
    Latest over 5 years ago
    by Andy Neil
  • Answered

    Cortex-R5: Divide-by-zero +1

    • Armv7 Exception Model
    • Cortex-R5
    • Processors
    • Software Development
    13221 views
    8 replies
    Latest over 5 years ago
    by Tau
  • Not Answered

    Intermediate results for single precision calculations 0

    5063 views
    4 replies
    Latest over 5 years ago
    by MandeepMIRA
  • Not Answered

    Cotex-M7 : Is there any hang case which TCMwait could make? 0

    • Cortex-M7
    2357 views
    0 replies
    Started over 5 years ago
    by kate mun
  • Answered

    Cortex-M7: Force Precise Exception on Bus Fault +1

    29922 views
    4 replies
    Latest over 5 years ago
    by Daniel Oliveira
  • Not Answered

    Hello! I´m new with stm mcu´s and I would like to know how to generate a 10ns pulse with stm32f407 discovery kit. Is it possible? 0

    2916 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    Can I run an A9 program under A53 without any modification 0

    20275 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    Cortex-M3 frequency 0

    6117 views
    2 replies
    Latest over 5 years ago
    by Joseph Yiu Arm Employee Badge
  • Not Answered

    Problem obtaining frame pointer in the call stack for STM32L4R9AI board 0

    6884 views
    6 replies
    Latest over 5 years ago
    by Charlie97
  • Suggested Answer

    Does Qualcomm Centriq 2400 support sve instruction set? 0

    24782 views
    5 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Not Answered

    Why aarch64 and x86 not support conditional execution like before? 0

    21283 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    System Frequency for CortexA35 0

    • Cortex-A35
    • Armv8-A
    23502 views
    1 reply
    Latest over 5 years ago
    by vstehle Arm Employee Badge
  • Answered

    mips of cortex a53 0

    35666 views
    6 replies
    Latest over 5 years ago
    by vstehle Arm Employee Badge
  • Not Answered

    PMU's cycles counter showing unstable values 0

    27186 views
    8 replies
    Latest over 5 years ago
    by Zhifei Yang Arm Employee Badge
  • Answered

    Address of core register on M0+ core 0

    4317 views
    2 replies
    Latest over 5 years ago
    by M_T
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