While reading the documentation on the MOV instruction (section A6.7.40) on the ARMv6-M architecture, I stumbled upon the following in the "Encoding T1" description: "ARMv6-M, ARMv7-M, if and both from R0-R7. Otherwise all versions of the Thumb instruction set.". I have trouble interpreting this.
My first thought was that the T1 encoding can only be used on ARMv6-M, ARMv7-M if the Rd and Rm registers are both from R0-R7, but this doesn't hold as it is perfectly possible to assemble a MOV instruction for (at least) the ARMv6-M architecture using the T1 encoding with Rm and Rd being greater than R7.
I have tried contacting the ARM support, but it wasn't very helpful at all.
Thank you very much! It's all clear now. I interpreted the implication the other way around, i.e. if you use the T1 encoding on ARMv6-m, both Rd and Rm have to be low registers. Thanks again for your quick and detailed reply.