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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3580 Questions
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  • Not Answered

    Execution stopped in EL3h mode at EL3:0x0000000000000200 +1

    • AArch64
    • Cortex-A53 FVP
    • Armv8-A
    4718 views
    1 reply
    Latest over 4 years ago
    by 42Bastian Schick
  • Not Answered

    Cortex-M4 interrupt occures right after it's disabled 0

    3248 views
    3 replies
    Latest over 4 years ago
    by 42Bastian Schick
  • Not Answered

    Cortex M33 non secure wifi 0

    • Peripheral Devices
    • APB Peripherals
    • wifi
    • TrustZone
    • Cortex-M33
    1721 views
    0 replies
    Started over 4 years ago
    by beze
  • Not Answered

    AXI4 VIP unable to change values of control signal 0

    • AMBA 4
    • AXI
    • AXI4
    5670 views
    1 reply
    Latest over 4 years ago
    by Colin Campbell Arm Employee Badge
  • Answered

    Using a 32bit libray in ArmV8 applicatio 0

    • Cortex-A53
    • Armv7-A
    • Armv8 Foundation Platform
    8425 views
    3 replies
    Latest over 4 years ago
    by 42Bastian Schick
  • Not Answered

    coherence between R82 and other cpu or hardware modules 0

    4158 views
    0 replies
    Started over 4 years ago
    by summer123
  • Not Answered

    Cortex-M3 bare metal start_up example error in clock ticks 0

    • Arm Development Studio
    • Cortex-M3
    • Getting Started
    • Keil MDK Cortex-M Edition
    • Cortex-M
    1729 views
    0 replies
    Started over 4 years ago
    by dak.sera
  • Not Answered

    Dev Board or Cycle Accurate Sim for Arm Cortex A-76/77/78 0

    • Cortex-A78AE
    • Cortex-A77
    • Cortex-A76
    13032 views
    2 replies
    Latest over 4 years ago
    by Armand Behroozi
  • Answered

    Two question in one, typedef union {} and funtion of integer +1

    2076 views
    2 replies
    Latest over 4 years ago
    by Andy Neil
  • Suggested Answer

    ARMV8 multithread 0

    • Cortex-A72
    • AArch64
    • Armv8-A
    6213 views
    2 replies
    Latest over 4 years ago
    by Rifakst
  • Not Answered

    SLVERR from L3 not raised in ISR of ARM PL310 L2 cache controller 0

    4608 views
    1 reply
    Latest over 4 years ago
    by flongnos
  • Not Answered

    Programming for Aarch64 0

    • AArch64
    • Programming Languages
    • Armv8-A
    6760 views
    4 replies
    Latest over 4 years ago
    by afernandezody
  • Answered

    Memory types in AXI4 protocol 0

    5963 views
    2 replies
    Latest over 4 years ago
    by dharma_vakkalagadda
  • Answered

    Vector Table relocation on M33/M55 0

    • Armv8.1-M
    • Cortex-M33
    • Armv8-M
    8355 views
    11 replies
    Latest over 4 years ago
    by Brijesh Reddy
  • Not Answered

    How do branch instructions influence the performance of Cortex-A77? 0

    2960 views
    1 reply
    Latest over 4 years ago
    by Zhifei Yang Arm Employee Badge
  • Not Answered

    access secure generic timer 0

    • ARMv8 Exception Model
    • Security
    • Arm64
    2708 views
    1 reply
    Latest over 4 years ago
    by Zhifei Yang Arm Employee Badge
  • Not Answered

    Regarding Visibility of Multi Master ACE-Lite System 0

    14671 views
    1 reply
    Latest over 4 years ago
    by Zhifei Yang Arm Employee Badge
  • Not Answered

    The certification for the development of Trusted Applets 0

    • OP-TEE
    • Trusted Execution Environment (TEE)
    • TrustZone
    13091 views
    1 reply
    Latest over 4 years ago
    by Zhifei Yang Arm Employee Badge
  • Not Answered

    Core_n System Timer reset behaviour 0

    • Cortex-A35
    • Armv8-A
    12545 views
    1 reply
    Latest over 4 years ago
    by Zhifei Yang Arm Employee Badge
  • Answered

    Use Cortex-A53 Cryptography Extension to optimize crypto operations. +1

    11751 views
    1 reply
    Latest over 4 years ago
    by Zhifei Yang Arm Employee Badge
<>
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