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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3585 Questions
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  • Not Answered

    [armv8][cortex-a72] why must flush data cache when I tried to map a SRAM area? 0

    • Armv8-A
    2204 views
    1 reply
    Latest over 3 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    CCA in Armv9 - Making Peripherals Only Accessible from a Realm VM 0

    • virtualization
    • Peripheral Controllers
    • TrustZone
    1875 views
    2 replies
    Latest over 3 years ago
    by Jay M.
  • Suggested Answer

    SError interrupt due to LDAXRB instruction when disable cache on NXP ls1046a 0

    • Armv8-A
    2069 views
    2 replies
    Latest over 3 years ago
    by Tony Tu
  • Suggested Answer

    Does the Arm Cortex-52+ support multi-core / cache coherent / SMP configurations? 0

    • Cortex-R52
    • Cache coherency
    • Cortex-R52+
    2948 views
    3 replies
    Latest over 3 years ago
    by EllieC Arm Employee Badge
  • Not Answered

    Clear recvBuff 0

    917 views
    0 replies
    Started over 3 years ago
    by Rishikeshb1998
  • Not Answered

    Power consumption of CM7 - is there a comparison between manufacturing nodes? 0

    832 views
    0 replies
    Started over 3 years ago
    by Tani
  • Answered

    CCA in Armv9 - Could Realm Management Monitor Check Realm VM's Data? 0

    • virtualization
    • Trusted Execution Environment (TEE)
    1979 views
    3 replies
    Latest over 3 years ago
    by djordje kovacevic Arm Employee Badge
  • Not Answered

    What signals, if any, can I omit from M0 verilog design when programming into FPGA? 0

    • Cortex-M0
    • FPGA
    1148 views
    0 replies
    Started over 3 years ago
    by BNguyen22
  • Not Answered

    Do we have any development board that supports Armv8.4 0

    1078 views
    0 replies
    Started over 3 years ago
    by irakatz
  • Answered

    cortex m7 frame pointer in prologue 0

    4840 views
    10 replies
    Latest over 3 years ago
    by Silicium
  • Answered

    armv8 write-back cache 0

    1965 views
    1 reply
    Latest over 3 years ago
    by Martin Weidmann Arm Employee Badge
  • Not Answered

    6x6 Complex Matrix Inversion on the ARM Cortex M4F processor 0

    • Cortex-M4
    1596 views
    1 reply
    Latest over 3 years ago
    by Oliver Beirne Arm Employee Badge
  • Suggested Answer

    What should be the value of the WLAST signal if the length of the write burst is always equal to 0 0

    1404 views
    1 reply
    Latest over 3 years ago
    by Colin Campbell Arm Employee Badge
  • Suggested Answer

    About PSTRB... 0

    • APB
    1604 views
    1 reply
    Latest over 3 years ago
    by Colin Campbell Arm Employee Badge
  • Not Answered

    CoreSight TMC current buffer level 0

    879 views
    0 replies
    Started over 3 years ago
    by Ranjith
  • Not Answered

    What is ARM CPU known state? 0

    • Armv8-A
    • psci
    1105 views
    0 replies
    Started over 3 years ago
    by YOO JEUNGWOO
  • Answered

    Cortex A9 freezing +1

    2285 views
    3 replies
    Latest over 3 years ago
    by rachelgomez123
  • Answered

    Coresight ETB - Errors on RRD Register 0

    3381 views
    2 replies
    Latest over 3 years ago
    by rachelgomez123
  • Suggested Answer

    kernel boot from SD card very slow 0

    1975 views
    1 reply
    Latest over 3 years ago
    by rachelgomez123
  • Suggested Answer

    Install Android OS on ARM Cortex 0

    • ARM Community
    5111 views
    2 replies
    Latest over 3 years ago
    by rachelgomez123
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