I see in the cortex R5 technical reference manual , it is mentioned as below for write through cache policy
Write-through. With this policy writes are performed to both the cache and main memory.This means that the cache and main memory are kept coherent. As there are more writesto main memory, a write-through policy is slower than a write-back policy if the writebuffer fills. Therefore write-through is less commonly used, although it can be useful fordebug. Regions marked as write-through are treated as non-cacheable.
It says " Regions marked as write-through are treated as non-cacheable." Does this mean, if a region is marked as write through, then reads in that region are also not cached?
I searched Cortex-R5 TRM, I did not see anywhere says 'Regions marked as write-through are treated as non-cacheable'.
https://developer.arm.com/documentation/ddi0460/d
Could you point me to the section or page number?
It' actually the programmer's guide developer.arm.com/.../Write-policy
ok, different processors treat Write-Through differently.
For most of Cortex-A processors, they treat Write-Through memory attribute in mmu table as no cacheable.
However, For Cortex-R5, it supports write-through, if the memory attribure is set as write-through, it behaviors as it.
Just to be clear, for cortex-R5, if cache write policy is set to write through, then reads are still cached for that region right?
Correct