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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3600 Questions
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  • Answered

    NE10-Library -> FIR-Filter cycle counts: C-version faster than NEON-version? +1

    • Raspberry Pi
    • NEON
    • Cortex-A
    • Cortex-A7
    10555 views
    4 replies
    Latest over 9 years ago
    by CFriebel
  • Answered

    ARM : LPC2148 Registers and programming examples 0

    • Cortex-M3
    • Cortex-M
    14973 views
    5 replies
    Latest over 9 years ago
    by Mohit Rohilla
  • Answered

    How to avoid bus error while using neon instruction vld2.32 on cortex a7? 0

    • Cortex-A
    • Cortex-A7
    15158 views
    8 replies
    Latest over 9 years ago
    by Katta Phani Kumar
  • Answered

    Reduce ARM CM0+ scatter initialization during boot? +1

    • Cortex-M0
    • Cortex-M
    3148 views
    1 reply
    Latest over 9 years ago
    by Simon Craske Arm Employee Badge
  • Answered

    Bit 0 of PC on ARMv8-M unset in non-secure code? 0

    • Cortex-M
    • Armv8-M
    5109 views
    3 replies
    Latest over 9 years ago
    by daith
  • Answered

    Cortex R4 versus ARM9E 0

    • Cortex-R
    • Cortex-R4
    4709 views
    2 replies
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Answered

    About FPU pipeline of Cortex-M7 0

    • Cortex-M7
    • Cortex-M
    3962 views
    1 reply
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Answered

    Can the linux  boot up without arm-trusted-firmware if the trustzone is not necessary ? 0

    • Arm Trusted Firmware
    • TrustZone
    • Linux
    18294 views
    5 replies
    Latest over 9 years ago
    by claud
  • Answered

    Read allocate will impact bzero performance or not +1

    • Cortex-A
    • Cortex-A7
    6773 views
    3 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Not Answered

    Problem in copying functions to RAM on ARM Cortex-M 0

    • Cortex-M
    • Cortex-M4
    13464 views
    11 replies
    Latest over 10 years ago
    by Mikey
  • Answered

    why AHB has two disparate data bus instead of one Bus for write/read? +1

    • AHB
    4201 views
    3 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    Question about AXI Wrapping burst +1

    • AXI
    9432 views
    3 replies
    Latest over 10 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    Cortex-M7 load instruction latency and pairing +1

    • Cortex-M7
    6082 views
    3 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Not Answered

    Yet another processor crash! 0

    • Cortex-M3
    • Cortex-M
    4031 views
    2 replies
    Latest over 10 years ago
    by Chris Williams
  • Answered

    Which processor has the most cores? +1

    • Cortex-A53
    • Cortex-A
    11915 views
    5 replies
    Latest over 10 years ago
    by daith
  • Answered

    M4/M0 dual core application. M0 fails to start 0

    • Cortex-M0
    • Cortex-M
    • Cortex-M4
    4648 views
    3 replies
    Latest over 10 years ago
    by Bo Mellberg
  • Answered

    Modified harvard architecture 0

    • Arm7
    28003 views
    13 replies
    Latest over 10 years ago
    by daith
  • Not Answered

    Does ordered-memory-access wait for response? 0

    • Cortex-A17
    • Cortex-A
    3651 views
    2 replies
    Latest over 10 years ago
    by loquat
  • Answered

    How to make ARM core hung +1

    • Armv7
    5747 views
    6 replies
    Latest over 10 years ago
    by Srikanth kumar muppandam
  • Not Answered

    Why do you use Cortex-M? 0

    • 32-bit
    • Cortex-M
    21968 views
    16 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
<>
Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
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  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
  • Cortex-A7
  • Cortex-A8
  • Cortex-A9
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  • Cortex-M0
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  • Cortex-M4
  • Cortex-M7
  • Cortex-R
  • Interrupt
  • Linux
  • Memory
  • Memory Management Unit (MMU)
  • NEON
  • TrustZone