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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3594 Questions
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  • Answered

    Could you explain this assembly line to me? 0

    • Thumb
    6190 views
    2 replies
    Latest over 10 years ago
    by Juha Aaltonen
  • Answered

    Basic tests on Cortex-A9, Cortex-A5x 0

    • Cortex-A9
    • Cortex-A5
    • Cortex-A
    4615 views
    1 reply
    Latest over 10 years ago
    by Chris Shore
  • Answered

    Difference between Sub regions and Overlapping Regions in MPU 0

    • Memory Protection Unit (MPU)
    10910 views
    4 replies
    Latest over 10 years ago
    by techguyz
  • Answered

    General Feature of Cortex processors on cache coherency 0

    • AMBA
    • Cortex-A9
    • Cache coherency
    • Cortex-A
    7840 views
    3 replies
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    code compile using -mcpu for ARM platform +1

    • Armv7-A
    • Cortex-A9
    • Cortex-A
    • Cortex-A8
    8011 views
    5 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    IRQ handler not called by ARM A53 0

    • Cortex-A53
    • Generic Interrupt Controller
    • Cortex-A
    14851 views
    12 replies
    Latest over 10 years ago
    by Deepak Jharodia
  • Answered

    Usage of Split/Lock Configuration +1

    • Cortex-R
    • Cortex-R5
    • Cortex-A
    5881 views
    4 replies
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    SMMU related question. 0

    • 32-bit
    • Memory Protection Unit (MPU)
    14480 views
    9 replies
    Latest over 10 years ago
    by Jay Zhao
  • Answered

    STREX always clears the exclusive access tag 0

    • Armv7-A
    • Armv7-R
    • Cortex-A
    6221 views
    2 replies
    Latest over 10 years ago
    by Gustavo A. R. Silva
  • Answered

    [Cortex-M0] Thumb mode & code size 0

    • Cortex-M0
    • Thumb
    • Cortex-M
    • Thumb2
    8996 views
    4 replies
    Latest over 10 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    Power Management Options in Cortex A 0

    • Juno Arm Development Platform
    • Cortex-A53
    • Cortex-A57
    • Cortex-A
    5662 views
    1 reply
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    share memory between core0 (linux) and core1 (bare-metal) +1

    • Cortex-A9
    • Cortex-A
    • Linux
    10371 views
    3 replies
    Latest over 10 years ago
    by Mike
  • Answered

    [CM3]assembly language trouble +1

    • Cortex-M3
    • Cortex-M
    • C
    6433 views
    6 replies
    Latest over 10 years ago
    by stupidMokey
  • Answered

    how to set endianness in ARM Cortex-A8 +1

    • DS-5 Development Studio
    • Cortex-A
    • Cortex-A8
    30227 views
    15 replies
    Latest over 10 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    What does an AHB slave do after issuing an ERROR, if the master decides to carry out the remaining transfers of the burst? +2

    • AMBA
    • AHB
    4589 views
    1 reply
    Latest over 10 years ago
    by Xiaotao Wang
  • Answered

    Support for pipelining flops in AXI +1

    • AXI
    • AXI4
    13148 views
    5 replies
    Latest over 10 years ago
    by Xingguang Feng Arm Employee Badge
  • Answered

    About AXI4 address channel and data channel handshake sequence +1

    • AMBA
    • AXI
    • AXI4
    7390 views
    1 reply
    Latest over 10 years ago
    by Xiaotao Wang
  • Answered

    AMBA AXI :Unaligned "INCR" data transfer +1

    • AMBA
    • AXI
    7622 views
    2 replies
    Latest over 10 years ago
    by Xiaotao Wang
  • Answered

    How does128Byte WriteLineUnique transaction map to a cache with 64Byte cache line size? +1

    • AMBA
    • AXI
    • ACE-Lite
    • Cortex-A
    • Cortex-A7
    4436 views
    1 reply
    Latest over 10 years ago
    by Xingguang Feng Arm Employee Badge
  • Not Answered

    Indication to begin a program 0

    • Cortex-M0
    • 32-bit
    • Armv7-M
    • Cortex-M
    • 64-bit
    • Cortex-M4
    5933 views
    8 replies
    Latest over 10 years ago
    by Jens Bauer
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Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
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  • AXI
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  • Cortex-M7
  • Cortex-R
  • Interrupt
  • Linux
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  • Memory Management Unit (MMU)
  • NEON
  • TrustZone