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Hi
my situation: Running an OS in normal-world which due to an (user) error enters safe state with interrupts disabled. The Hypervisor enters by an FIQ (watchdog) and should reset the normal-world.
No the problem: If the normal-world error happens in an interrupt and EOI wasn't written, then the interrupt keeps active.
In the FIQ-Handler I do an EOI with the IPI vector.
How do I know which ID to write into EOI? Do I have to scan all active bits?
Reading ICCHPIR always returns 0x3fe. Reading ICCIAR returns 0x3ff.
Currently I know the ID, so if I write the correct value, active state goes away.
Any hint?
The Cortex-A9 does not support the ARMv7-A Virtualization Extensions, so no Hyp mode. Am I right that you're running your Hypervisor in Secure state?
ICCHPIR (GICC_HPPIR) will only tell you about Pending interrupts. If the NS OS has already read ICCIAR (GICC_IAR), then interrupt would be Active (or possible Active and Pending) rather than Pending.
You could use the ICDABRn registers to see what interrupts are active. Actually dealing with any Active interrupts could be tricky. As this register doesn't which core has acknowledged an SPI. If you've only got a SPI targeting a single core at any one time, they would make things easier.
Hi Martin,
yes I use secure state to realize a Hypervisor.
Meanwhile I scan all NS interrupts in ICDABRn and do an EOI (with ICCICR.ACKCTL = 1). This works (so far) with my test application.