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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3594 Questions
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  • Not Answered

    purpose of RSDIS in ACTLR ? 0

    • Cortex-R
    • Cortex-R4
    7434 views
    8 replies
    Latest over 9 years ago
    by G. Goodwin L. Pitos
  • Answered

    In AHB, can i program HSPLITx signal from slave sequence +1

    • AHB
    3481 views
    1 reply
    Latest over 9 years ago
    by Colin Campbell Arm Employee Badge
  • Answered

    CORTEX-A processor interrupt handling +1

    • Armv7
    • Armv8
    • Cortex-A
    • AArch32
    7267 views
    1 reply
    Latest over 9 years ago
    by Matt Sealey Arm Employee Badge
  • Answered

    When are A32 state and A64 state determined? 0

    • EL1
    • Armv7
    • EL2
    • AArch64
    • EL0
    • AArch32
    7947 views
    5 replies
    Latest over 9 years ago
    by lookTEE
  • Answered

    Cache type and cache operation sequence +1

    • AMBA
    • ACE
    • Cache
    7258 views
    3 replies
    Latest over 9 years ago
    by Michael Williams Arm Employee Badge
  • Not Answered

    Cortex M7 : Exception return query 0

    • Cortex-M7
    • Cortex-M
    8246 views
    5 replies
    Latest over 9 years ago
    by Ritesh Joshi
  • Answered

    How to configure L2 cache in Cortex-A7 +1

    • Cache
    • Cortex-A
    • Cortex-A7
    8382 views
    1 reply
    Latest over 9 years ago
    by Matt Sealey Arm Employee Badge
  • Answered

    ARM Cortex M4F - Directly wiring USB Connection (Custom PCB) +1

    5579 views
    1 reply
    Latest over 9 years ago
    by G. Goodwin L. Pitos
  • Answered

    On ARM Cortex-R4F, when I disable instruction and data cache using SCTLR register bits I and C, what happens to MPU region that defines region attribute as cachable (write-back)? Would it be ignored since global cache is disabled or would it result in unk +1

    • Processor
    4866 views
    3 replies
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Not Answered

    Barriers in in-order cores like cortex-A53, A7 0

    • Cortex-A53
    • Cortex-A
    • Cortex-A7
    8531 views
    4 replies
    Latest over 9 years ago
    by oootha
  • Answered

    RTC and Watch dog timer CMSIS driver API 0

    • CMSIS
    6353 views
    1 reply
    Latest over 9 years ago
    by G. Goodwin L. Pitos
  • Answered

    which ARM version that i should use for PLC +1

    • Cortex-R
    • Cortex-A
    • Cortex-M
    12797 views
    6 replies
    Latest over 9 years ago
    by G. Goodwin L. Pitos
  • Answered

    Memory partitioning on Cortex-A7 0

    • Security
    • CortexA7
    • Cortex-A
    • TrustZone
    • Baremetal
    • Memory
    • Linux
    5598 views
    3 replies
    Latest over 9 years ago
    by Peter Harris Arm Employee Badge
  • Not Answered

    cortex A9 multi-core 0

    • Cortex-A9
    • Cortex-A
    4357 views
    1 reply
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Answered

    Cortex M3 peripheral Bit Banding limit? 0

    • Cortex-M3
    • Cortex-M
    21341 views
    18 replies
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Answered

    ETM not working on stm32f7 +1

    • Cortex-M
    4454 views
    1 reply
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Answered

    real time digital signal processing and its performance analysis 0

    • Cortex-M3
    • Cortex-M
    • CMSIS
    4374 views
    2 replies
    Latest over 9 years ago
    by Amit
  • Not Answered

    Using the whole Cortex-A L2 Cache without external memory 0

    • Cache
    • Cortex-A
    • Cortex-A7
    25017 views
    16 replies
    Latest over 9 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    cortex m0 0

    • Cortex-M0
    • Armv6-M
    • Cortex-M
    4669 views
    2 replies
    Latest over 9 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    What is the meaning of a 64 bit aligned stack pointer address? 0

    • Armv6-M
    • Armv7-M
    • Cortex-M
    • Cortex-M4
    23083 views
    10 replies
    Latest over 9 years ago
    by Joseph Yiu Arm Employee Badge
<>
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