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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3586 Questions
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  • Answered

    How do I implement the cortex M3 Boot ROM code? +1

    • Cortex-M3
    • Cortex-M
    11004 views
    4 replies
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    CP15SDISABLE +1

    • Raspberry Pi
    • Cortex-A
    6472 views
    4 replies
    Latest over 7 years ago
    by AALLeeXX
  • Answered

    Programming TZASC in Secure Mode +1

    • Cortex-A
    3612 views
    1 reply
    Latest over 7 years ago
    by 42Bastian Schick
  • Answered

    Fail to add JTAG/swd debug into Cortex-M0 0

    • Cortex-M0
    • Cortex-M
    9673 views
    3 replies
    Latest over 7 years ago
    by ele
  • Answered

    Using GPIO for timing execution of functions +1

    • Cortex-M7
    • Cortex-M
    4093 views
    1 reply
    Latest over 7 years ago
    by 42Bastian Schick
  • Answered

    How to start Firmware separated in I-RAM and D-RAM within Cortex-M3 design kit? 0

    • CMSDK
    • Cortex-M
    8520 views
    5 replies
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Not Answered

    Is there any tool to profile power of a C code on Linux running on Cortex A53? 0

    • Cortex-A53
    • Cortex-A
    3326 views
    1 reply
    Latest over 7 years ago
    by Zhifei Yang
  • Not Answered

    Cortex A15 vs A73 speed Odroid XU4(A15 1,8GHz) vs Hikey 960(A73 2,4GHz) 0

    • Cortex-A
    • Cortex-A73
    5600 views
    1 reply
    Latest over 7 years ago
    by Zhifei Yang
  • Answered

    Using ARM TrustZone OS in the UEFI 0

    • Arm Trusted Firmware
    • TrustZone
    9387 views
    2 replies
    Latest over 7 years ago
    by qwertytmp1
  • Answered

    Virtualizing GICv2. 0

    • Armv8-A
    • Generic Interrupt Controller
    5400 views
    3 replies
    Latest over 7 years ago
    by 42Bastian Schick
  • Answered

    Learning lpcxpresso 0

    • Cortex-M
    2938 views
    1 reply
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    How can I test uSDCARD of V2M-MPS2 board? 0

    • Cortex-M
    • Cortex-M Prototyping System (V2M-MPS2)
    2753 views
    1 reply
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    What happens when offset value becomes 30 in case of load/store operation +1

    • Cortex-M
    • Cortex-M4
    2658 views
    1 reply
    Latest over 7 years ago
    by Zhifei Yang
  • Answered

    What happens if a same priority exception came while context-switch is executing? 0

    • Cortex-M3
    • Cortex-M
    5802 views
    2 replies
    Latest over 7 years ago
    by kaizsv
  • Answered

    Data synchronization Barrier and cache. +1

    • Armv7-A
    • Cache
    • Cortex-A
    4753 views
    3 replies
    Latest over 7 years ago
    by Marcin.Kondraciuk@secom.com.pl
  • Answered

    MRS [A/C]PSR latency armv8-a? +1

    • Cortex-A9
    • Armv8-A
    • Cortex-A
    4198 views
    1 reply
    Latest over 7 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    Processor sometimes ignoring WFI instruction 0

    • Cortex-M0
    • Cortex-M
    7709 views
    4 replies
    Latest over 7 years ago
    by Adrian
  • Answered

    A53 preload mechanism +1

    • Cortex-A53
    • AArch64
    • Cortex-A
    5215 views
    2 replies
    Latest over 7 years ago
    by MarkL
  • Answered

    ACP and DMA usage on A53 +1

    • Cortex-A9
    • Armv8-A
    • Cortex-A
    11561 views
    9 replies
    Latest over 7 years ago
    by 42Bastian Schick
  • Answered

    Non-Cacheable memory and DMA on armv7a 0

    • Armv7-A
    • Cortex-A9
    • Cortex-A
    • Cortex-A7
    12701 views
    11 replies
    Latest over 7 years ago
    by Vincent Siles
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Topics being discussed in this forum
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