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ARM cortext A53 Physical Address Flush

Since ARM caches are physically indexed is there any way to flush based on the PA? I know I can get the set, but what about the way? If I am flushing from L1 would I have to flush all ways in L1 and then L2 assuming there is no L3 to get to system memory?

Is there an example of this written somewhere? All examples I have seen use VA.

Thanks!

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