In ARM926ej-s processor architecture there are two interrupt lines IRQ, FIQ. Suppose on IRQ line,interrupt comes too fast after one interrupt is latched. So is there any queue which will store pending interrupt request or when the first interrupt came then interrupts coming immediately after first interrupt will be ignored?
AFAIK it is the responsibility of the interrupt controller outside the core to handle this and report only a new interrupt after the previous has been acknowledged. But the respective TRM can tell you more.