I am trying verify the bridge...........
I am working on ahb bridge , I am trying to sample address when hready is high .
is it correct or not ?
Address is indepent of hready signal ...................
Please help me.......
Hi jd_,According to AMBA Specification (Rev 2.0) (ARM IHI 0011A), there are the following descriptions.
3.3 Overview of AMBA AHB operationA write data bus is used to move data from the master to a slave, while a read data busis used to move data from a slave to the master.Every transfer consists of:• an address and control cycle• one or more cycles for the data.The address cannot be extended and therefore all slaves must sample the address during this time. The data, however, can be extended using the HREADY signal. When LOW this signal causes wait states to be inserted into the transfer and allows extra time for the slave to provide or sample data.This says that an address phase would not be affected by HREADY.
3.3 Overview of AMBA AHB operation
A write data bus is used to move data from the master to a slave, while a read data busis used to move data from a slave to the master.Every transfer consists of:• an address and control cycle• one or more cycles for the data.The address cannot be extended and therefore all slaves must sample the address during this time. The data, however, can be extended using the HREADY signal. When LOW this signal causes wait states to be inserted into the transfer and allows extra time for the slave to provide or sample data.
This says that an address phase would not be affected by HREADY.
So to observe HHREADY for sampling the address would be useless.The sentence which you had referred would have inconsistency woth the simple transfer in Figure 3-3.How do you think?
Best regards,Yasuhiko Koumoto.