I am trying verify the bridge...........
I am working on ahb bridge , I am trying to sample address when hready is high .
is it correct or not ?
Address is indepent of hready signal ...................
Please help me.......
Hi narendra2875,
No, it is not correct.You should sample address when the hsel is high.
Best regards,Yasuhiko Koumoto.
You are both partially correct; an AHB slave (the bridge in this example) should only sample the address phase inputs when HREADY is high on an HCLK rising edge. Then it will see whether it is selected, and what the transfer address is.
See 2nd paragraph of section 3.8 of the AMBA 2 AHB spec (section 4.1 of the AHB-lite spec), where it describes exactly this event.
"A slave must only sample the address and control signals and HSELx when HREADY is HIGH, indicating that the current transfer is completing"
JD
Hi jd_,According to AMBA Specification (Rev 2.0) (ARM IHI 0011A), there are the following descriptions.
3.3 Overview of AMBA AHB operationA write data bus is used to move data from the master to a slave, while a read data busis used to move data from a slave to the master.Every transfer consists of:• an address and control cycle• one or more cycles for the data.The address cannot be extended and therefore all slaves must sample the address during this time. The data, however, can be extended using the HREADY signal. When LOW this signal causes wait states to be inserted into the transfer and allows extra time for the slave to provide or sample data.This says that an address phase would not be affected by HREADY.
3.3 Overview of AMBA AHB operation
A write data bus is used to move data from the master to a slave, while a read data busis used to move data from a slave to the master.Every transfer consists of:• an address and control cycle• one or more cycles for the data.The address cannot be extended and therefore all slaves must sample the address during this time. The data, however, can be extended using the HREADY signal. When LOW this signal causes wait states to be inserted into the transfer and allows extra time for the slave to provide or sample data.
This says that an address phase would not be affected by HREADY.
So to observe HHREADY for sampling the address would be useless.The sentence which you had referred would have inconsistency woth the simple transfer in Figure 3-3.How do you think?
Hi narendra2875 and jd_,
I have heard from an actual AHB implementer about the issue.As the results, the sampling of the address should be performed when HSEL=1 and HREADY=1.Therefore, I think the basic timing diagrams described in the specs will be inappropriate.
He had given me the following implementation tips.- From a master side, while the first access was waited by HREADY=Low,the next address should be kept being the same value. So, the address would become valid when HREADY=High.- From a slave side, slaves which are not accessed should keep HREADYOUT High.- Some ARM IPs change their address output during HREADY=Low. So, addresses when HREADY=Low could not be trusted.