what does that arrow indicates(arrow from mclk to a[31:0] ?
thank you sir,
can you suggest me any .pdf or document to get knowledge about all these timing diagram for arm7 so i can understand it in depth as your answer is right but i am unable to get all things due to insufficient knowledge about bus timing of arm7tdmi.
Hi ineev,
The ARM7TDMI TRM would be the document I'd expect you should refer to for details of how that core works, but as your first question was quoting diagrams from that TRM I guess you already have it.
So what sort of areas do you need more info on that are not covered by the ARM7TDMI's TRM ?
JD
thank you for helping me.
i want get knowledge on arm7tdmi core and want to learn in depth like how core is interfaced with memory in SoC and memory mapping and memory remapping concept in one of the arm7 based SoC named lpc2148 so that i can come to know what mechanism they have used in memory mapping and remapping and the role of SoC and CORE in Remapping the memory so that is why i have started from scratch (i.e bus timing and all).
actually i am programmer (c, assembly and linux kernel) and what to learn ARM core in Depth so if you can help me on topics i have told in above paragraph so it would be very helpful to me.
Sorry but I've never used that device, so cannot say how the ARM7TDMI core has been integrated with the rest of the "lpc2148" system.
If nobody on this forum can help you, it might be better approaching the vendor of this device, which I think might be NXP based on what I am seeing when searching for this part.
I'm also seeing that it is based on the ARM7TDMI-S rather than the ARM7TDMI, so different signal timings because it is a synthesisable core.