AXI3 & AXI4 wrap burst length

Actually my question is related to supported burst length for WRAP transfers.

As per AXI3 spec,

"for wrapping bursts, the burst length must be 2, 4, 8, or 16"

Q1. Is this true? or does it support all transfer lengths? Confusion is because of this line in AXI spec: "AXI3 supports burst lengths of 1 to 16 transfers, for all burst types." which indicates WRAP should support any transfer length between 1 to 16.

Q2. Is it same for both AXI4 & AXI3?

Regards

Utkarsh

Hi,

the below is from A3.4.1 Address structure of AMBA® AXI™ and ACE™ Protocol
Specification AXI3™, AXI4™, and AXI4-Lite™ ACE and ACE-Lite™ ARM IHI 0022E (ID022613)".
Please read the following descriptions and the questions would be solved.

Burst length
The burst length is specified by:
• ARLEN[7:0], for read transfers
• AWLEN[7:0], for write transfers.
In this specification, AxLEN indicates ARLEN or AWLEN.
AXI3 supports burst lengths of 1 to 16 transfers, for all burst types.
AXI4 extends burst length support for the INCR burst type to 1 to 256 transfers. Support for all other burst types in
AXI4 remains at 1 to 16 transfers.
The burst length for AXI3 is defined as,
Burst_Length = AxLEN[3:0] + 1
The burst length for AXI4 is defined as,
Burst_Length = AxLEN[7:0] + 1, to accommodate the extended burst length of the INCR burst type in AXI4.
AXI has the following rules governing the use of bursts:
• for wrapping bursts, the burst length must be 2, 4, 8, or 16
• a burst must not cross a 4KB address boundary
• early termination of bursts is not supported.
No component can terminate a burst early. However, to reduce the number of data transfers in a write burst, the
master can disable further writing by deasserting all the write strobes. In this case, the master must complete the
remaining transfers in the burst. In a read burst, the master can discard read data, but it must complete all transfers
in the burst.

Best regards,
Yasuhiko Koumoto.

Hi Utkarsh,

In both AXI3 and AXI4, WRAPx bursts can only have lengths 2, 4, 8 or 16 transfers, so exactly as the later comment describing wrapping bursts states. The concept of a WRAP burst allows you to read in a cache line with the critical word first, and then fetching the remainder of the cache line after the first access. Cache lines are (usually) powers of 2 in length, hence these specific lengths.

The earlier comment about burst lengths of 1 to 16 transfers for all burst types was trying to be generic about the burst length limitations of AXI3 before then stating what AXI4 has added.

So FIXED bursts can have any length from 1-16 transfers in both AXI3 and AXI4.

And WRAP bursts can have lengths 2, 4, 8 or 16 in both AXI3 and AXI4.

But INCR bursts can have lengths 1-16 in AXI3 and 1-256 in AXI4.

JD