Hi,
Was going through AXI spec.
As per AXI spec:
"AXI3 supports burst lengths of 1 to 16 transfers, for all burst types."
"AXI4 extends burst length support for the INCR burst type to 1 to 256 transfers. Support for all other burst types in
AXI4 remains at 1 to 16 transfers."
Also, as per AXI spec:
"for wrapping bursts, the burst length must be 2, 4, 8, or 16"
These are two contradicting lines for WRAP burst type. Can anyone confirm what's allowed specifically for AXI3 & AXI4?
Thanks
Utkarsh
the below is from A3.4.1 Address structure of AMBA® AXI™ and ACE™ ProtocolSpecification AXI3™, AXI4™, and AXI4-Lite™ ACE and ACE-Lite™ ARM IHI 0022E (ID022613)".Please read the following descriptions and the questions would be solved.
Burst lengthThe burst length is specified by:• ARLEN[7:0], for read transfers• AWLEN[7:0], for write transfers.In this specification, AxLEN indicates ARLEN or AWLEN.AXI3 supports burst lengths of 1 to 16 transfers, for all burst types.AXI4 extends burst length support for the INCR burst type to 1 to 256 transfers. Support for all other burst types inAXI4 remains at 1 to 16 transfers.The burst length for AXI3 is defined as,Burst_Length = AxLEN[3:0] + 1The burst length for AXI4 is defined as,Burst_Length = AxLEN[7:0] + 1, to accommodate the extended burst length of the INCR burst type in AXI4.AXI has the following rules governing the use of bursts:• for wrapping bursts, the burst length must be 2, 4, 8, or 16• a burst must not cross a 4KB address boundary• early termination of bursts is not supported.No component can terminate a burst early. However, to reduce the number of data transfers in a write burst, themaster can disable further writing by deasserting all the write strobes. In this case, the master must complete theremaining transfers in the burst. In a read burst, the master can discard read data, but it must complete all transfersin the burst.
Best regards,Yasuhiko Koumoto.