How writing ICC_EOIR1_EL1 works for Group 1 Interrupts when running on EL3 in GICv3?

Hi,

I have a question regarding how an ARMv8A core would handle a Group1 interrupt when it is running in EL3.

The GICv3/v4 Arch. Document states the following:

- A write to ICC_EOIR1_EL1 performs a priority drop for Non-secure Group 1 interrupts, if the PE is
operating in Non-secure state or at EL3.
- When operating in Secure state, a write to ICC_EOIR1_EL1 performs a priority drop for Secure Group 1
interrupts.

The first sentence implies that a core operating in EL3 would handle(perform a priority drop) a Group1 Non secure interrupt.
In the second sentence that operating in secure state would perform a priority drop.

Does the secure state in the second sentance implies EL-S only or does it include EL3 too? In another way is operating in EL3 able to handle both secure and non-secure interrupts. or Non-secure only?

Thanks.