R5 MPU regions

Hi, 

I am using an SOC with R5 core. The TRM mentions the following memory space for DDR memory.

I want to divide it into following approximate regions:

Cached: ~512MB

Rest: Uncached.

1. Based on ARMv7 MPU constraints (starting address multiple of size, size should be power of 2)... Is it possible? or any other possible division suggestion?

2. I want to create a background region of 4GB, starting address = 0, size = 0xffffffff. Does it comply MPU constraints?

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  • 1. Based on ARMv7 MPU constraints (starting address multiple of size, size should be power of 2)... Is it possible? or any other possible division suggestion?

    Possible. Here're the options I could think of :
    (1) With only one region : if you pick the start address aligned with region size 512MB : (e.g. 0x4000_0000, 0x6000_0000,..., 0xC000_0000).

    (2) With multiple region : in case if you have constraint of starting address to be 0x3000_0000 always. Then you may divide the regions in multiple. For example, 2 consecutive regions of 256MB with starting address (0x3000_0000 and 0x4000_0000). You can further divide the regions based on granularity you need (and available number of regions).

    2. I want to create a background region of 4GB, starting address = 0, size = 0xffffffff. Does it comply MPU constraints?

    What do you mean by size=0xffffffff (is it 4GB?). If so, DRSR.Region_Size supports regions size from 256B to 4GB in increments of power of 2. And start address =0 also comply with requirement. See TRM for details.

Reply
  • 1. Based on ARMv7 MPU constraints (starting address multiple of size, size should be power of 2)... Is it possible? or any other possible division suggestion?

    Possible. Here're the options I could think of :
    (1) With only one region : if you pick the start address aligned with region size 512MB : (e.g. 0x4000_0000, 0x6000_0000,..., 0xC000_0000).

    (2) With multiple region : in case if you have constraint of starting address to be 0x3000_0000 always. Then you may divide the regions in multiple. For example, 2 consecutive regions of 256MB with starting address (0x3000_0000 and 0x4000_0000). You can further divide the regions based on granularity you need (and available number of regions).

    2. I want to create a background region of 4GB, starting address = 0, size = 0xffffffff. Does it comply MPU constraints?

    What do you mean by size=0xffffffff (is it 4GB?). If so, DRSR.Region_Size supports regions size from 256B to 4GB in increments of power of 2. And start address =0 also comply with requirement. See TRM for details.

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