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R5 MPU regions


I am using an SOC with R5 core. The TRM mentions the following memory space for DDR memory.

I want to divide it into following approximate regions:

Cached: ~512MB

Rest: Uncached.

1. Based on ARMv7 MPU constraints (starting address multiple of size, size should be power of 2)... Is it possible? or any other possible division suggestion?

2. I want to create a background region of 4GB, starting address = 0, size = 0xffffffff. Does it comply MPU constraints?