Arm Blog

Power, performance and area or "PPA," as it is called, has become a universally interesting topic to system-on-chip (SoC) designers around the world.  Atrenta -- an ARM Connected Community…

Now available design strategies and documentation to ease the migration to an ARM platform - From one programmer to another.  You could say I'm an "Acorn boy" - I cut my programming teeth on personal computers…

Tri-gate or Fin-FET devices have been scrutinized for about 10 years and are considered a viable solution only when conventional planar MOS devices are not able to deliver the expected performance while…

The Jasper User Group Meeting was held on November 8 & 9 and was full of presentations on the diverse ways that users are applying formal techniques — some in areas where never before thought possible…

Updated 29th October 2013High performance and power efficiency are critical to the latest mobile devices, and AMBA® 4 ACE™ is a fundamental technology supporting ARM's big.LITTLE proces…

At the TSMC Open Innovation Platform (OIP) forum in San Jose this week Mike Inglis, the General Manager of the Processor Division at ARM, presented a keynote speech succinctly titled "Enabling Smart System…

I've recently realized just how similar mechanical and electronic engineering are when it comes to energy conservation. You see, I've recently begun construction of an energy-efficient, Frank-Lloyd Wright…

Thank goodness for the new packetization, virtual networking and clock gating features of the ARM CoreLink NIC-400. I'm fed up with hearing about spurious comparisons between a single humungous crossbar…

ARM IP and ARM processor  usage is pervasive across multiple segments of the electronics industry. As shown in Figure 1, each of these market segments have unique design challenges and analysis drivers…

If you missed DAC, then you missed the seminar on cache coherency and verification of cache coherency given by ARM and Jasper.  Learn how to overcome the typical challenges of capturing the intent, reviewing…

In the previous three blogs (Parts 1, 2 and 3) I've outlined the background and key decisions involved in the development and implementation of the Elba testchip.  Now we'll look at the final steps taken…

In part 1 of this blog, I outlined the thought process behind the Elba program. Here I'll look at the implementation decisions for the project.In ARM there are various stages of maturity of a new processor…

"Wouldn't it be interesting if we....". That's the way many step changes have started in ARM.  In the next four blogs I'd like to take this opportunity to tell you about just one of those, we called it…

The answer is functional safety applications.  At least, that's where TI's ARM® Cortex™-R cores are utilized - in high performance, real-time microcontrollers. As many real-time…

A wide variety of applications will be impacted by the massive trend which is broadly named as the "Internet of Things" (IoT). Even if some may consider this term as being overused, and newer marketing…

A couple of weeks ago Atmel launched the SAM D20 family of products with a comprehensive roll-out of product information, including one of the most impressive of uses that I have seen in a while of all…

As usual it happened late on Friday afternoon. A couple of weeks ago a message arrived in my inbox from one of our latest ARM® Cortex™-M0+ partners: "We're using 90LP and a similar configuration…

Stack buffer overflows are an all too common failure mode in embedded systems where a program accidentally, or maliciously, overwrites fixed-length buffers on the call stack resulting in loss of system…