Arm Blog

I may only weigh in at just over half a square millimeter on die, but I can handle a heavy workload and I pack quite a processing punch, and frankly I'm tired of the lack of respect I get as a "LITTLE…

With the ARM Cortex-A50 series processors, ARM has introduced a "big" and "LITTLE" processor pair that is 64-bit capable. What does this mean for big.LITTLE software?

At last the time has finally come when I can talk about AMBA 5 - the next generation of Arm interface standard.  So, what's new?

As the adoption of Arm big.LITTLE processing spreads there are a number of common questions which have been raised. I'd like to use this blog to answer some of the more common queries.

The System-on-a-Chip (SoC) ecosystem spans the gamut of designs from high-end servers to low-power mobile consumer segments. A large and heterogeneous set of players (foundries, IP vendors, SoC integrators…

Back in April, I wrote about how Atrenta - an ARM Connected Community Partner - was helping to tame the SoC design problem with early power, performance and area or ePPA technology.  ePPA holds great promise…

During the ARM® -Mentor® seminar Tuesday, July 17, the nearly 100 attendees heard about the goals and ambitions of the long-term partnership between Mentor and ARM to improve testing of ARM cores…

At just under 14 minutes, with a top speed of 300km/hour, my commute to an airport on public rail transportation has never been faster! I wasn't on the high-speed public rail systems that typically come…

It's often said that as one gets older, time appears to pass faster and faster. As proof of that it seems only yesterday that I had a full head of hair and ARM launched big.LITTLE. In fact it's been…

Bringing test patterns for your ARM core or other core-level blocks together for chip-level test of your SoC can present significant challenges. Whether your core-level test patterns are scan-based or…

If you've watched any sporting event on television lately, you've seen the pressure put on referees and umpires.  They have to make split-second decisions in real-time, having viewed ultra-high-speed action…

It is entirely appropriate that ARM will announce technical details of its latest hard macro product, the Cortex™-A15 MP4 Hard Macro for TSMC 28HPM node at COOL Chips XV, the IEEE Symposium on Low…

Power, performance and area or "PPA," as it is called, has become a universally interesting topic to system-on-chip (SoC) designers around the world.  Atrenta -- an ARM Connected Community…

Now available design strategies and documentation to ease the migration to an ARM platform - From one programmer to another.  You could say I'm an "Acorn boy" - I cut my programming teeth on personal computers…

Tri-gate or Fin-FET devices have been scrutinized for about 10 years and are considered a viable solution only when conventional planar MOS devices are not able to deliver the expected performance while…

The Jasper User Group Meeting was held on November 8 & 9 and was full of presentations on the diverse ways that users are applying formal techniques — some in areas where never before thought possible…

Updated 29th October 2013High performance and power efficiency are critical to the latest mobile devices, and AMBA® 4 ACE™ is a fundamental technology supporting ARM's big.LITTLE proces…

At the TSMC Open Innovation Platform (OIP) forum in San Jose this week Mike Inglis, the General Manager of the Processor Division at ARM, presented a keynote speech succinctly titled "Enabling Smart System…