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Arm Development Studio Platinum 2021.a is required to debug RD_N2 FVP.
Select a Reference Design (RD) platform. There is a list of platforms here. For this guide we are using RD-N2 release tag RD-INFRA-2021.05.27.
For this guide, we have installed the software stack to ~/rd-infra.
~/rd-infra
Download the software stack using the guide here.
Make sure model-scripts/sgi/uefi.sh contains platforms_rdinfra[rdn2]=1
model-scripts/sgi/uefi.sh
platforms_rdinfra[rdn2]=1
~/rd-infra$ grep "platforms_rdinfra\[rdn2\]" model-scripts/sgi/uefi.shplatforms_rdinfra[rdn2]=1
In uefi/edk2/edk2-platforms/Platform/ARM/SgiPkg/Drivers/PlatformDxe/PlatformDxe.inf under section Protocols add gHestTableProtocolGuid.
uefi/edk2/edk2-platforms/Platform/ARM/SgiPkg/Drivers/PlatformDxe
/PlatformDxe.inf
Protocols
gHestTableProtocolGuid
[Protocols] gEfiAcpiTableProtocolGuid ## CONSUMES gEfiAcpiSdtProtocolGuid ## CONSUMES gHestTableProtocolGuid ## SOMETIMES CONSUMES
Now build the software stack. This generates the config files we need to modify.
~/rd-infra$ ./build-scripts/build-test-uefi.sh -p rdn2 all
~/rd-infra$
./build-scripts/build-test-uefi.sh -p rdn2 all
In uefi/edk2/Conf/tools_def.txt and uefi/edk2/BaseTool/Conf/tools_def.template remove -Os from line DEFINE GCC_ALL_CC_FLAGS. This makes debugging much easier by not space optimising the firmware.
uefi/edk2/Conf/tools_def.txt and uefi/edk2/BaseTool/Conf/tools_def.template
-Os
DEFINE GCC_ALL_CC_FLAGS
uefi/edk2/Conf/tools_def.txt:
uefi/edk2/Conf/tools_def.txt
DEFINE GCC_ALL_CC_FLAGS = -g -fshort-wchar -fno-builtin -fno-strict-aliasing -Wall -Werror -Wno-array-bounds -include AutoGen.h -fno-common
Add –g to DEFINE_GCC_ASM_FLAGS to generate debug information.
–g
DEFINE_GCC_ASM_FLAGS
DEFINE GCC_ASM_FLAGS = -g -c -x assembler -imacros AutoGen.h
Optional: Update tools_def.template to reflect these changes in the future.
~/rd-infra$ cp uefi/edk2/Conf/tools_def.txt uefi/edk2/BaseTools/Conf/tools_def.template
Disable SPM. The build will fail unless it’s disabled.
In build-scripts/configs/rdn2/rdn2 make ARM_TF_ENABLE_SPM=0
build-scripts/configs/rdn2/rdn2
ARM_TF_ENABLE_SPM=0
In uefi/edk2/edk2-platforms/Platform/ARM/SgiPkg/RdN2/RdN2.dsc add the following line in section PcdsFixedAtBuild.common to enable verbose printing.
uefi/edk2/edk2-platforms/Platform/ARM/SgiPkg/RdN2/RdN2.dsc
PcdsFixedAtBuild.common
gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x00400000
Set 0x00400000 to a combination of these flags:
0x00400000
#define DEBUG_INIT 0x00000001 // Initialization #define DEBUG_WARN 0x00000002 // Warnings #define DEBUG_LOAD 0x00000004 // Load events #define DEBUG_FS 0x00000008 // EFI File system #define DEBUG_POOL 0x00000010 // Alloc & Free (pool) #define DEBUG_PAGE 0x00000020 // Alloc & Free (page) #define DEBUG_INFO 0x00000040 // Informational debug messages #define DEBUG_DISPATCH 0x00000080 // PEI/DXE/SMM Dispatchers #define DEBUG_VARIABLE 0x00000100 // Variable #define DEBUG_BM 0x00000400 // Boot Manager #define DEBUG_BLKIO 0x00001000 // BlkIo Driver #define DEBUG_NET 0x00004000 // Network Io Driver #define DEBUG_UNDI 0x00010000 // UNDI Driver #define DEBUG_LOADFILE 0x00020000 // LoadFile #define DEBUG_EVENT 0x00080000 // Event messages #define DEBUG_GCD 0x00100000 // Global Coherency Database changes #define DEBUG_CACHE 0x00200000 // Memory range cachability changes #define DEBUG_VERBOSE 0x00400000 // Detailed debug messages that may // significantly impact boot performance #define DEBUG_ERROR 0x80000000 // Error
from uefi/edk2/MdePkg/Include/Library/DebugLib.h
uefi/edk2/MdePkg/Include/Library/DebugLib.h
Download the correct FVP version for the platform and version you selected.
For RD-N2 version RD-INFRA-2021.05.27 navigate to Neoverse N2 Reference Design FVP and click Download RD-N2.
Run the installer FVP_RD_N2.sh.
FVP_RD_N2.sh
Modify model-scripts/rdinfra/platforms/rdn2/run_model.sh:
model-scripts/rdinfra/platforms/rdn2/run_model.sh
remove -R parameter from PARAMS= section. This stops the model from running as soon as a debug server is connected.
-R
PARAMS=
PARAMS="--data css.scp.armcortexm7ct=$OUTDIR/scp_ramfw.bin@0x0BD80000 \ --data css.mcp.armcortexm7ct=$OUTDIR/mcp_ramfw.bin@0x0BF80000 \ -C css.mcp.ROMloader.fname=$OUTDIR/mcp_romfw.bin \ -C css.scp.ROMloader.fname=$OUTDIR/scp_romfw.bin \ -C css.trustedBootROMloader.fname=$OUTDIR/$BL1_IMAGE \ -C board.flashloader0.fname=$OUTDIR/$FIP_IMAGE \ -C board.flashloader1.fname=$PWD/nor1_flash.img \ -C board.flashloader1.fnameWrite=$PWD/nor1_flash.img \ -C board.flashloader2.fname=$PWD/nor2_flash.img \ -C board.flashloader2.fnameWrite=$PWD/nor2_flash.img \ -S \ -C css.scp.pl011_uart_scp.out_file=${MODEL_TYPE,,}/${UART0_SCP_OUTPUT_FILE_NAME} \ -C css.scp.pl011_uart_scp.unbuffered_output=1 \ -C css.scp.pl011_uart_scp.uart_enable=true \
Rebuild:
TF-A loads BL33_AP_UEFI binary (the UEFI firmware) to the address specified by PLAT_ARM_NS_IMAGE_BASE in arm-tf/include/plat/arm/css/common/css_dev.h
arm-tf/include/plat/arm/css/common/css_dev.h
~/rd-infra$ grep PLAT_ARM_NS_IMAGE_BASE arm-tf/include/plat/arm/css/common/css_def.h
#define PLAT_ARM_NS_IMAGE_BASE U(0xE0000000)
The start address is 0xE0000000
Update MODEL environment variable with your FVP_RD_N2 model executable.
export MODEL=~/FVP_RD_N2/models/Linux64_GCC-6.4/FVP_RD_N2
Go to model-scripts/rdinfra and run uefi.sh -p rdn2
~/rd-infra$ cd model-scripts/rdinfra/
~/rd-infra/model-scripts/rdinfra$ ./uefi.sh -p rdn2
The FVP will now start and wait for a debugger to connect.
Launch ArmDS Platinum 2021.a
Create a new debug connection
Select "Model Connection" and next
Enter a name for the connection.
Select "Add a new Model"
Select CADI as the model interface
Select "Browse for model running on local host"
Once your model terminal says “CADI Debug Server started for ARM Models...” the model should appear in arm DS.
Click Finish. The edit configuration window should then appear.
Under “Connection” select Imported/Infra5_RD_N2/Bare Metal Debug/ARM_Neoverse-N2x15 Multi-Cluster SMP
Under Debugger, check “Execute Debugger Commands” and enter a breakpoint for the UEFI entry point we found earlier.
Click Debug. The debugger should connect to the FVP.
The debugging script for UEFI is in the tianocore/edk2 repository so needs to be fetched manually.
~/rd-infra$ cd uefi/edk2
~/rd-infra/uefi/edk2$ git remote add tianocore https://github.com/tianocore/edk2
~/rd-infra/uefi/edk2$ git fetch tianocore --unshallow
~/rd-infra/uefi/edk2$ git cherry-pick fddb8d24eccdcf467a8c777a9a22f4a1e54bf7dd
If you have not connected to the FVP, click "Connect" to connect.
Currently it has stopped at EL3:0x00000000. This is the TF-A firmware. Click continue (F8) to start execution. It will then break at EL2N:0xE0000000.
Hit Continue (F8) again to let the FVP load into UEFI uninterrupted. This will load all the modules you would like to debug so that the debugger knows where they are.
Do the same actions in the same order you will when you are debugging as this affects the locations of the modules. For example, open UEFI interface -> Enter UEFI Shell -> Load EFI driver in the same order each time.
Take note of the file name of the UART log. This can be found in the terminal window where you ran uefi.sh. The UART log contains the addresses of the module locations and will be used to load the debug symbols.
Once you have loaded into the UEFI menu, stop the simulation.
In Arm DS, go to the scripts tab and hit "Import a script or directory" then "Import a DS or Jython script"
Select the script "~/rd-infra/uefi/edk2/ArmPlatformPkg/Scripts/Ds5/cmd_load_symbols.py".
Right click the script in the list and select "Parameters"
Enter the following parameters
-p (<UEFI entry point>, 0x20000) The UEFI entry point was found earlier (0xE0000000). 0x20000 is the size which can be found in the UEFI build log.
-p (<UEFI entry point>, 0x20000)
-a -v
-i <path to UART log file> This is the path to the UART log which was produced by a running the whole UEFI process
-i <path to UART log file>
-o <path to objdump executable> This is the path to aarch64-none-linux-gnu-objdump. If you followed the installation instructions, this will be ~/rd-infra/tools/gcc/gcc-arm-10.2-2020.11-x86_64-aarch64-none-linux-gnu/bin/aarch64-none-linux-gnu-objdump
-o <path to objdump executable>
The script has now been setup.
To load debug symbols, right click the script and select "Run" after you have entered the UEFI firmware (at the breakpoint EL2N:0xE0000000) or later.
If you are debugging SEC or PEI you need to be aware of whether your module has a dynamic address.
Before PEI is reloaded, all the module addresses are defined at build time, however once the MMU has been initialized, modules are loaded and allocated memory. The dynamic addresses are the same between runs, however they may be different if you rebuild EDK2, or if you perform actions in a different order. If you are debugging a module before PeiCore has been reloaded, remove the -i and -o arguments from the cmd_load_symbols script so that the dynamic modules aren't loaded. The debug symbols for some modules will be defined twice if you don't do this, which could cause some symbols to not be loaded.
Now that the debug symbols are loaded, we can run through the UEFI boot process.
First we enter the Security (SEC) stage. This is located where the branch instruction at the UEFI entry point (0xE0000000) is pointing. (0xE0017FD8).
SEC does some setup and passes control to PEI.
The module is located at uefi/edk2/ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf. It is called ArmPlatformPrePeiCore.
PEI sets up hardware abstractions of devices like CPU and Memory for DXE to use. It does this searching the Firmware Volumes for PEIMs, loads them, then attempts to dispatch them.
When MemoryPeim is dispatched, which sets up the MMU, the PeiCore is reloaded into memory at a dynamic memory address.
PEI Foundation (PeiCore) entry point is located in uefi/edk2/MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.c
Pre-EFI Initialization Modules create an abstraction of a specific piece of hardware. They can work with other PEIMs using PPI (PEIM to PEIM Interface).
The PEI dispatcher calls one PEIM at a time, invoking it's entrypoint function. These functions perform initialization for the PEIM, which then register a service. This could be a PPI service for other PEIMs to call, or a HOB (Hand Off Block) which can be passed to DXE.
Now that all PEIMs are loaded and all corresponding HOBs have been created, PeiCore uses Dxe Initial Program Load (DxeIpl) with a list of HOBs to call DxeCore.
The entrypoint of the DxeCore is DxeMain()
Similar to PEI, DXE traverses the Firmware Volumes looking for DXE drivers.
DxeMain initialises exception handlers, debug agent for DXE phase, DXE memory subsystem, EFI system table, EFI Runtime Services Table, Image services and Event services.
It then installs protocols and starts the dispatcher.
The dispatcher finds DXE drivers, loads them into memory and transfers control to them. Each driver can then install protocols and perform initialisation.
One of the drivers loaded is BdsDxe. This installs gEfiBdsArchProtocolGuid, which is used to jump to the BDS entry and transitions to the BDS stage.
BDSDxe reads the boot order list from EFI variables.
Boot timeout EFI is evaluated and user input from keyboard and mouse is connected. UI applications are shown.